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Shigeo Sato

Section

Research Institute of Electrical Communication

Job title

Professor

Degree

博士（情報科学）（東北大学）
工学修士（東北大学）

researchmap

https://researchmap.jp/read0046796

J-GLOBAL ID

200901020861203688

Professional Memberships 3

応用物理学会
神経回路学会
電子情報通信学会

Research Interests 2

量子計算機
脳型計算機、量子計算機

Research Areas 1

Manufacturing technology (mechanical, electrical/electronic, chemical engineering) / Electronic devices and equipment /

Awards 2

石田記念財団研究奨励賞

2005/10　石田記念財団　高温超伝導量子計算機に関する基礎的研究
電子情報通信学会論文賞

2000/05　電子情報通信学会

Papers 160

Precision Microfluidic Control of Neuronal Ensembles in Cultured Cortical Networks

Hakuba Murota, Hideaki Yamamoto, Nobuaki Monma, Shigeo Sato, Ayumi Hirano‐Iwata

Advanced Materials Technologies　2025/02

DOI： 10.1002/admt.202400894 　
Analog VLSI Implementation of Subthreshold Spiking Neural Networks and Its Application to Reservoir Computing

Satoshi Moriya, Masaya Ishikawa, Satoshi Ono, Hideaki Yamamoto, Yasushi Yuminaka, Yoshihiko Horio, Jordi Madrenas, Shigeo Sato

IEEE Transactions on Circuits and Systems I: Regular Papers　2025

DOI： 10.1109/TCSI.2025.3550876 　
Directional intermodular coupling enriches functional complexity in biological neuronal networks

Nobuaki Monma, Hideaki Yamamoto, Naoya Fujiwara, Hakuba Murota, Satoshi Moriya, Ayumi Hirano-Iwata, Shigeo Sato

Neural Networks　106967-106967　2024/11
Publisher: Elsevier BV
DOI： 10.1016/j.neunet.2024.106967 　

ISSN： 0893-6080
In silico modeling of reservoir-based predictive coding in biological neuronal networks on microelectrode arrays

Yuya Sato, Hideaki Yamamoto, Yoshitaka Ishikawa, Takuma Sumi, Yuki Sono, Shigeo Sato, Yuichi Katori, Ayumi Hirano-Iwata

Japanese Journal of Applied Physics　2024/10/01

DOI： 10.35848/1347-4065/ad7ec1 　
Design of mixed-signal LSI with analog spiking neural network and digital inference circuits for reservoir computing, Peer-reviewed

Satoshi MoriyaHideaki YamamotoMasaya IshikawaYasushi YuminakaYoshihiko HorioJordi MadrenasShigeo Sato

Proc. IEEE World Congress on Computational Intelligence　2024/06

DOI： 10.1109/IJCNN60899.2024.10649999 　
Numerical Study on Physical Reservoir Computing With Josephson Junctions

Kohki Watanabe, Yoshinao Mizugaki, Satoshi Moriya, Hideaki Yamamoto, Taro Yamashita, Shigeo Sato

IEEE Transactions on Applied Superconductivity　34　(3)　1-4　2024/05
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
DOI： 10.1109/tasc.2024.3350576 　

ISSN： 1051-8223

eISSN： 1558-2515 2378-7074
Bifurcation phenomena observed from two-variable spiking neuron integrated circuit.

Takemori Orima, Yoshihiko Horio, Satoshi Moriya, Shigeo Sato

ISCAS　1-5　2024

DOI： 10.1109/ISCAS58744.2024.10558075 　
Enhanced responses to inflammatory cytokine interleukin-6 in micropatterned networks of cultured cortical neurons

Mamoru Sakaibara, Hideaki Yamamoto, Hakuba Murota, Nobuyuki Monma, Shigeo Sato, Ayumi Hirano-Iwata

Biochemical and Biophysical Research Communications　149379-149379　2023/12
Publisher: Elsevier BV
DOI： 10.1016/j.bbrc.2023.149379 　

ISSN： 0006-291X
Modular Topology Enhances Reservoir Computing Performance in Biological Neuronal Networks

Sumi Takuma, Yamamoto Hideaki, Katori Yuichi, Ito Koki, Sato Shigeo, Hirano-Iwata Ayumi

IEICE Proceeding Series　76　687-688　2023/09/21
Publisher: The Institute of Electronics, Information and Communication Engineers
DOI： 10.34385/proc.76.d2l-11 　

eISSN： 2188-5079

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Reservoir computing is a machine learning paradigm that employs high-dimensional dynamical systems for information processing. Although biological neuronal networks (BNNs) have been utilized to implement reservoir computing to provide insight into their computation properties, the neurons in conventional cultured neuronal networks are randomly connected, generating atypical dynamics characterized by highly correlated bursting activity not observed in healthy brains. In this study, we used micropatterning technology to fabricate BNNs with modular topology, a structural feature conserved in brain networks, and to understand how the dynamics within non-random networks of neuronal cells are linked to computing. Our study demonstrated that the modular BNN reservoir is capable of classifying both image and time-series data above chance levels. The modular structure in BNN contributes to the increased reservoir computing performance, in line with previous computational models with neuromorphic networks. Combining experiments with biological neuronal network and computational modeling can advance our understanding of computing principles in multicellular neuronal networks.
Bottom-Up Investigation of Multicellular Computing Within Biological Neuronal Networks

Yamamoto Hideaki, Sumi Takuma, Sato Yuya, Sato Shigeo, Hirano-Iwata Ayumi

IEICE Proceeding Series　76　594-595　2023/09/21
Publisher: The Institute of Electronics, Information and Communication Engineers
DOI： 10.34385/proc.76.c4l-11 　

eISSN： 2188-5079

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In this presentation, we will first introduce our studies aimed at reproducing an evolutionarily-conserved net-work structure in cultured neuronal networks on engineered glass coverslips and CMOS-based high-density microelectrode arrays. We then describe our recent attempts to couple the engineered neuronal networks with external stimulation to reveal their response to noise and spatiotemporally-patterned inputs to show that bioengineering technologies offer novel tools in investigating computational aspects of multicellular networks of biological neurons.
Memory state evaluation of spatio-temporal contextual learning memory network based on output spike rate Peer-reviewed

Takemori Orima, Takeru Tsuji, Yoshihiko Horio, Satoshi Moriya, Shigeo Sato

Proc. International Symposium on Nonlinear Theory and Its Applications　378-381　2023/09

DOI： 10.34385/proc.76.B4L-35 　
Analog hardware implementation of spiking neural networks for edge computing Peer-reviewed

Satoshi Moriya, Hideaki Yamamoto, Shigeo Sato, Yasushi Yuminaka, Yoshihiko Horio, Jordi Madrenas

Proc. International Symposium on Nonlinear Theory and Its Applications　317-318　2023/09

DOI： 10.34385/proc.76.B3L-32 　
Modular architecture facilitates noise-driven control of synchrony in neuronal networks

Hideaki Yamamoto, F. Paul Spitzner, Taiki Takemuro, Victor Buendía, Hakuba Murota, Carla Morante, Tomohiro Konno, Shigeo Sato, Ayumi Hirano-Iwata, Anna Levina, Viola Priesemann, Miguel A. Muñoz, Johannes Zierenberg, Jordi Soriano

Science Advances　2205　10563　2023/08/25

DOI： 10.1126/sciadv.ade1755 　
Microfluidic technologies for reconstituting neuronal network functions in vitro Invited

Hideaki Yamamoto, Ayumi Hirano-Iwata, Shigeo Sato

JSAP Review　2023　230420　2023/07/06

DOI： 10.11470/jsaprev.230420 　
Biological neurons act as generalization filters in reservoir computing

Takuma Sumi, Hideaki Yamamoto, Yuichi Katori, Koki Ito, Satoshi Moriya, Tomohiro Konno, Shigeo Sato, Ayumi Hirano-Iwata

Proceedings of the National Academy of Sciences　2210.02913　2023/06/20

DOI： 10.1073/pnas.2217008120 　
マイクロ流体デバイスを用いた神経回路機能の実細胞再構成 Invited

山本英明, 平野愛弓, 佐藤茂雄

応用物理　92　(5)　278-282　2023/05/01

DOI： 10.11470/oubutsu.92.5_278 　
Real-Time Adaptive Physical Sensor Processing with SNN Hardware

Jordi Madrenas, Bernardo Vallejo-Mancero, Josep Àngel Oltra-Oltra, Mireya Zapata, Jordi Cosp-Vilella, Robert Calatayud, Satoshi Moriya, Shigeo Sato

2023

DOI： 10.1007/978-3-031-44192-9_34 　
Time-Series Classification in Micropatterned Neuronal Network Reservoirs

Takuma Sumi, Hideaki Yamamoto, Yuichi Katori, Koki Ito, Shigeo Sato, Ayumi Hirano-Iwata

IEICE Proceeding Series　71　173-175　2022/12/12
Publisher: The Institute of Electronics, Information and Communication Engineers
DOI： 10.34385/proc.71.a5l-d-02 　

eISSN： 2188-5079

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Reservoir computing provides a novel framework to understand how the dynamics within biological neuronal networks (BNNs) is linked to information processing. Here, we used micropatterned substrates to fabricate BNNs with modular topology, one of the important structural features of brain networks, and realized a reservoir system with the modular BNN. Using image and time-series classification tasks, we evaluated the reservoir computing properties of the BNN reservoirs. The results show that modularity facilitates the separation between the trajectories of the neuronal responses to different spatial patterns, pointing to the functional advantage of the animals to modular topology within the nervous systems.
Ultra-low power analog CMOS implementation of spiking neural networks for reservoir computing applications Peer-reviewed

Satoshi Moriya, Hideaki Yamamoto, Shigeo Sato, Yasushi Yuminaka, Yoshihiko Horio, Jordi Madrenas

Proceedings of International Symposium on Nonlinear Theory and Its Applications　171-172　2022/12

DOI： 10.34385/proc.71.A5L-D-01 　
A Fully Analog CMOS Implementation of a Two-variable Spiking Neuron in the Subthreshold Region and its Network Operation

Satoshi Moriya, Hideaki Yamamoto, Shigeo Sato, Yasushi Yuminaka, Yoshihiko Horio, Jordi Madrenas

2022 International Joint Conference on Neural Networks (IJCNN)　2022/07/18
Publisher: IEEE
DOI： 10.1109/ijcnn55064.2022.9891920 　
Microfluidic cell engineering on high-density microelectrode arrays for assessing structure-function relationships in living neuronal networks

Yuya Sato, Hideaki Yamamoto, Hideyuki Kato, Takashi Tanii, Shigeo Sato, Ayumi Hirano-Iwata

arXiv preprint　2205　04342　2022/05
Publisher: Frontiers Media SA
DOI： 10.48550/arXiv.2205.04342 　

eISSN： 1662-453X

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Neuronal networks in dissociated culture combined with cell engineering technology offer a pivotal platform to constructively explore the relationship between structure and function in living neuronal networks. Here, we fabricated defined neuronal networks possessing a modular architecture on high-density microelectrode arrays (HD-MEAs), a state-of-the-art electrophysiological tool for recording neural activity with high spatial and temporal resolutions. We first established a surface coating protocol using a cell-permissive hydrogel to stably attach a polydimethylsiloxane microfluidic film on the HD-MEA. We then recorded the spontaneous neural activity of the engineered neuronal network, which revealed an important portrait of the engineered neuronal network–modular architecture enhances functional complexity by reducing the excessive neural correlation between spatially segregated modules. The results of this study highlight the impact of HD-MEA recordings combined with cell engineering technologies as a novel tool in neuroscience to constructively assess the structure-function relationships in neuronal networks.
Designing the human-centric IoT society: Cooperative industry-academic strategies for creative future connection

Yoshihiko Horio, Kiyotaka Naoe, Shigeo Sato, Yasunori Yamanouchi, Yasunari Takaura, Mitsuyuki Yamaguchi, Masato Morishima, Ayumi Hirano-Iwata

Nonlinear Theory and Its Applications, IEICE　13　(2)　197-202　2022
Publisher: Institute of Electronics, Information and Communications Engineers (IEICE)
DOI： 10.1587/nolta.13.197 　

eISSN： 2185-4106
An investigation of the relationship between numerical precision and performance of Q-learning for hardware implementation

Oguchi Daisuke, Moriya Satoshi, Yamamoto Hideaki, Sato Shigeo

Nonlinear Theory and Its Applications, IEICE　13　(2)　427-433　2022
Publisher: The Institute of Electronics, Information and Communication Engineers
DOI： 10.1587/nolta.13.427 　

eISSN： 2185-4106
A Subthreshold Spiking Neuron Circuit Based on the Izhikevich Model Peer-reviewed

Shigeo Sato, Satoshi Moriya, Yuka Kanke, Hideaki Yamamoto, Yoshihiko Horio, Yasushi Yuminaka, Jordi Madrenas

Lecture Notes in Computer Science　177-181　2021/09
Publisher: Springer International Publishing
DOI： 10.1007/978-3-030-86383-8_14 　

ISSN： 0302-9743

eISSN： 1611-3349
Hardware-Software Co-Design for Efficient and Scalable Real-Time Emulation of SNNs on the Edge

Josep Angel Oltra-Oltra, Jordi Madrenas, Mireya Zapata, Bernardo Vallejo, Diana Mata-Hernandez, Shigeo Sato

2021 IEEE International Symposium on Circuits and Systems (ISCAS)　2021/05
Publisher: IEEE
DOI： 10.1109/iscas51556.2021.9401615 　
Reservoir computing properties of in-silico/in-vitro modular neuronal networks

Sumi Takuma, Yamamoto Hideaki, Takemuro Taiki, Moriya Satoshi, Sato Shigeo, Hirano-Iwata Ayumi

JSAP Annual Meetings Extended Abstracts　2021.1　2185-2185　2021/02/26
Publisher: The Japan Society of Applied Physics
DOI： 10.11470/jsapmeeting.2021.1.0_2185 　

eISSN： 2436-7613
Computational Efficiency of a Modular Reservoir Network for Image Recognition

Yifan Dai, Hideaki Yamamoto, Masao Sakuraba, Shigeo Sato

Frontiers in Computational Neuroscience　15　2021/02/05
Publisher: Frontiers Media SA
DOI： 10.3389/fncom.2021.594337 　

eISSN： 1662-5188

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Liquid state machine (LSM) is a type of recurrent spiking network with a strong relationship to neurophysiology and has achieved great success in time series processing. However, the computational cost of simulations and complex dynamics with time dependency limit the size and functionality of LSMs. This paper presents a large-scale bioinspired LSM with modular topology. We integrate the findings on the visual cortex that specifically designed input synapses can fit the activation of the real cortex and perform the Hough transform, a feature extraction algorithm used in digital image processing, without additional cost. We experimentally verify that such a combination can significantly improve the network functionality. The network performance is evaluated using the MNIST dataset where the image data are encoded into spiking series by Poisson coding. We show that the proposed structure can not only significantly reduce the computational complexity but also achieve higher performance compared to the structure of previous reported networks of a similar size. We also show that the proposed structure has better robustness against system damage than the small-world and random structures. We believe that the proposed computationally efficient method can greatly contribute to future applications of reservoir computing.
Learning rule for a quantum neural network inspired by Hebbian learning

Yoshihiro Osakabe, Shigeo Sato, Hisanao Akima, Mitsunaga Kinjo, Masao Sakuraba

IEICE Transactions on Information and Systems　E104D　(2)　237-245　2021/02/01

DOI： 10.1587/transinf.2020EDP7093 　

ISSN： 0916-8532

eISSN： 1745-1361
Analog-circuit implementation of multiplicative spike-timing-dependent plasticity with linear decay

Satoshi Moriya, Tatsuki Kato, Daisuke Oguchi, Hideaki Yamamoto, Shigeo Sato, Yasushi Yuminaka, Yoshihiko Horio, Jordi Madrenas

Nonlinear Theory and Its Applications, IEICE　12　(4)　685-694　2021
Publisher: Institute of Electronics, Information and Communications Engineers (IEICE)
DOI： 10.1587/nolta.12.685 　

eISSN： 2185-4106
Polydimethylsiloxane microfluidic films for in vitro engineering of small-scale neuronal networks

Taiki Takemuro, Hideaki Yamamoto, Shigeo Sato, Ayumi Hirano-Iwata

Japanese Journal of Applied Physics　59　(11)　2020/11

DOI： 10.35848/1347-4065/abc1ac 　

ISSN： 0021-4922

eISSN： 1347-4065
Electron-cyclotron resonance Ar plasma-induced electrical activation of B atoms without substrate heating in B doped Si epitaxial films on Si(100)

Wu Li, Masao Sakuraba, Shigeo Sato

Materials Science in Semiconductor Processing　107　2020/03/01

DOI： 10.1016/j.mssp.2019.104823 　

ISSN： 1369-8001
Impact of electrical field noise on micropatterned neuronal networks

Sumi Takuma, Yamamoto Hideaki, Wakimura Kei, Sato Shigeo, Hirano-Iwata Ayumi

JSAP Annual Meetings Extended Abstracts　2020.1　3653-3653　2020/02/28
Publisher: The Japan Society of Applied Physics
DOI： 10.11470/jsapmeeting.2020.1.0_3653 　

eISSN： 2436-7613
Modular networks of spiking neurons for applications in time-series information processing

Satoshi Moriya, Hideaki Yamamoto, Ayumi Hirano-Iwata, Shigeru Kubota, Shigeo Sato

Nonlinear Theory and Its Applications, IEICE　11　(4)　590-600　2020
Publisher: Institute of Electronics, Information and Communications Engineers (IEICE)
DOI： 10.1587/nolta.11.590 　

eISSN： 2185-4106
A spiking neuron MOS circuit for low-power neuromorphic computation Peer-reviewed

Shigeo Sato, Yuki Tamura, Satoshi Moriya, Tatsuki Kato, Masao Sakuraba, Yoshihiko Horio, Jordi Madrenas

Proceedings of International Symposium on Nonlinear Theory and Its Applications　80-80　2019/12
(Invited) Low-Energy Plasma Enhanced Chemical Vapor Deposition and In-Situ Doping for Junction Formation in Group-IV Semiconductor Devices

Masao Sakuraba, Shigeo Sato

ECS Meeting Abstracts　2019/09/01

DOI： 10.1149/MA2019-02/25/1164 　
An Izhikevich Model Neuron MOS Circuit for Low Voltage Operation Peer-reviewed

Yuki Tamura, Satoshi Moriya, Tatsuki Kato, Masao Sakuraba, Yoshihiko Horio, Shigeo Sato

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)　11727 LNCS　718-723　2019/09
Publisher: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
DOI： 10.1007/978-3-030-30487-4_55 　
IzhikevichニューロンモデルMOS回路の提案

田村祐樹, 守谷哲, 加藤達暉, 櫻庭政夫, 堀尾喜彦, 佐藤茂雄

電子情報通信学会技術報告　NC2018-60　93-93　2019/03
Mean-field analysis of directed modular networks Peer-reviewed

Satoshi Moriya, Hideaki Yamamoto, Hisanao Akima, Ayumi Hirano-Iwata, Shigeru Kubota, Shigeo Sato

Chaos: An Interdisciplinary Journal of Nonlinear Science　29　(1)　013142　2019/01/01

DOI： 10.1063/1.5044689 　
Impact of modular organization on dynamical richness in cortical networks

Hideaki Yamamoto, Satoshi Moriya, Katsuya Ide, Takeshi Hayakawa, Hisanao Akima, Shigeo Sato, Shigeru Kubota, Takashi Tanii, Michio Niwano, Sara Teller, Jordi Soriano, Ayumi Hirano-Iwata

Science Advances　4　(11)　2018/11/02

DOI： 10.1126/sciadv.aau4914 　
Quantum Associative Memory with Quantum Neural Network via Adiabatic Hamiltonian Evolution Peer-reviewed

Yoshihiro Osakabe, Hisanao Akima, Masao Sakuraba, Mitsunaga Kinjo, Shigeo Sato

IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS　E100D　(11)　2683-2689　2017/11

DOI： 10.1587/transinf.2017EDP7138 　

ISSN： 1745-1361
Electrical properties and B depth profiles of in-situ B doped Si films grown by ECR Ar plasma CVD without substrate heating Peer-reviewed

Koya Motegi, Naofumi Ueno, Masao Sakuraba, Yoshihiro Osakabe, Hisanao Akima, Shigeo Sato

MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING　70　50-54　2017/11

DOI： 10.1016/j.mssp.2016.10.030 　

ISSN： 1369-8001

eISSN： 1873-4081
Electronic properties of Si/Si-Ge Alloy/Si(100) heterostructures formed by ECR Ar plasma CVD without substrate heating Peer-reviewed

Naofumi Ueno, Masao Sakuraba, Yoshihiro Osakabe, Hisanao Akima, Shigeo Sato

MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING　70　55-62　2017/11

DOI： 10.1016/j.mssp.2016.09.035 　

ISSN： 1369-8001

eISSN： 1873-4081
Silicon-Carbon alloy film formation on Si(100) using SiH4 and CH4 reaction under low-energy ECR Ar plasma irradiation Peer-reviewed

Shogo Sasaki, Masao Sakuraba, Hisanao Akima, Shigeo Sato

MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING　70　188-192　2017/11

DOI： 10.1016/j.mssp.2016.10.046 　

ISSN： 1369-8001

eISSN： 1873-4081
モジュール構造型神経回路モデルにおける同期活動のメカニズム

守谷哲, 山本英明, 井手克哉, 秋間学尚, 平野愛弓, 庭野道夫, 久保田繁, 佐藤茂雄

信学技報　117　(325)　19-23　2017/11
Publisher:
ISSN： 0913-5685
Neuro-inspired quantum associative memory using adiabatic hamiltonian evolution Peer-reviewed

Yoshihiro Osakabe, Shigeo Sato, Hisanao Akima, Masao Sakuraba, Mitsunaga Kinjo

Proceedings of the International Joint Conference on Neural Networks　2017-　803-807　2017/06/30
Publisher: Institute of Electrical and Electronics Engineers Inc.
DOI： 10.1109/IJCNN.2017.7965934 　
Modularity-dependent modulation of synchronized bursting activity in cultured neuronal network models Peer-reviewed

Satoshi Moriya, Hideaki Yamamoto, Hisanao Akima, Ayumi Hirano-Iwata, Michio Niwano, Shigeru Kubota, Shigeo Sato

Proceedings of the International Joint Conference on Neural Networks　2017-　1163-1168　2017/06/30
Publisher: Institute of Electrical and Electronics Engineers Inc.
DOI： 10.1109/IJCNN.2017.7965983 　
An artificial neural network with an analogue spin-orbit torque device Peer-reviewed

W.A. Borders, H. Akima, S. Fukami, S. Moriya, S. Kurihara, A. Kurenkov, Yoshihiko Horio, S. Sato, H. Ohno

Proceedings of the IEEE International Magnetics Conference　2017/04/24

DOI： 10.1109/INTMAG.2017.8007937 　
スピン軌道トルク磁気メモリデバイスを用いた自己連想記憶

秋間学尚, Borders William, 深見俊輔, 守谷哲, 栗原祥太, Kurenkov Alexander, 下橋亮太, 堀尾喜彦, 佐藤茂雄, 大野英男

電子情報通信学会総合大会講演論文集　S-31-S-31　2017/03/22
アナログ磁気メモリデバイスを用いた自己連想記憶システムの構築

栗原祥太, 秋間学尚, William A. Borders, 深見俊輔, 守谷哲, Aleksandr Kurenkov, 下橋亮太, 堀尾喜彦, 佐藤茂雄, 大野英男

電子情報通信学会技術報告　116　(521)　127-132　2017/03/13
Publisher:
ISSN： 0913-5685
Low-energy plasma CVD for epitaxy and in-situ doping of group-IV semiconductors in nanoelectronics Peer-reviewed

Sakuraba, M., Akima, H., Sato, S.

Chemical Vapor Deposition (CVD): Types, Uses and Selected Research　61-115　2017/02
Complexity reduction of neural network model for local motion detection in motion stereo vision

Akima, H., Kawakami, S., Madrenas, J., Moriya, S., Yano, M., Nakajima, K., Sakuraba, M., Sato, S.

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)　10639 LNCS　2017
Publisher: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
DOI： 10.1007/978-3-319-70136-3_88 　
Carrier properties of B atomic-layer-doped Si films grown by ECR Ar-plasma-enhanced CVD without substrate heating Peer-reviewed

Masao Sakuraba, Katsutoshi Sugawara, Takayuki Nosaka, Hisanao Akima, Shigeo Sato

SCIENCE AND TECHNOLOGY OF ADVANCED MATERIALS　18　(1)　294-306　2017

DOI： 10.1080/14686996.2017.1312520 　

ISSN： 1468-6996

eISSN： 1878-5514
Analogue spin-orbit torque device for artificial-neural-network-based associative memory operation Peer-reviewed

William A. Borders, Hisanao Akima, Shunsuke Fukami, Satoshi Moriya, Shouta Kurihara, Yoshihiko Horio, Shigeo Sato, Hideo Ohno

Applied Physics Express　10　(1)　013007　2017/01/01
Publisher: Japan Society of Applied Physics
DOI： 10.7567/APEX.10.013007 　

ISSN： 1882-0786 1882-0778

eISSN： 1882-0786
Epitaxy and In-Situ Doping of Group-IV Semiconductors by Low-Energy Plasma CVD for Quantum Heterointegration in Nanoelectronics (Invited Paper) Peer-reviewed

M. Sakuraba, H. Akima, S. Sato

Abstracts of the Energy Materials Nanotechnology (EMN) Meeting on Epitaxy, Budapest, Hungary, Sep. 4-8, 2016　2016/09

DOI： 10.13140/RG.2.2.27706.18889 　

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Abstract presented at the Energy Materials Nanotechnology (EMN) Meeting on Epitaxy, Budapest, Hungary, Sep. 4-8, 2016, No.A19, pp.61-63.
CMOS Majority Circuit with Large Fan-In Peer-reviewed

Hisanao Akima, Yasuhiro Katayama, Masao Sakuraba, Koji Nakajima, Jordi Madrenas, Shigeo Sato

IEICE TRANSACTIONS ON ELECTRONICS　E99C　(9)　1056-1064　2016/09

DOI： 10.1587/transele.E99.C.1056 　

ISSN： 1745-1353
Size-dependent regulation of synchronized activity in living neuronal networks Peer-reviewed

Hideaki Yamamoto, Shigeru Kubota, Yudai Chida, Mayu Morita, Satoshi Moriya, Hisanao Akima, Shigeo Sato, Ayumi Hirano-Iwata, Takashi Tanii, Michio Niwano

PHYSICAL REVIEW E　94　(1)　012407　2016/07

DOI： 10.1103/PhysRevE.94.012407 　

ISSN： 2470-0045

eISSN： 2470-0053
神経回路の同期的活動に対するモジュール構造の影響に関する計算論的研究

守谷哲, 山本英明, 秋間学尚, 平野愛弓, 庭野道夫, 久保田繁, 佐藤茂雄

信学技報　116　(120)　217-222　2016/06/28
Learning Method for a Quantum Bit Network Peer-reviewed

Yoshihiro Osakabe, Shigeo Sato, Mitsunaga Kinjo, Koji Nakajima, Hisanao Akima, Masao Sakuraba

ARTIFICIAL NEURAL NETWORKS AND MACHINE LEARNING - ICANN 2016, PT I　9886　558-559　2016

ISSN： 0302-9743
VLSI Design of a Neural Network Model for Detecting Planar Surface from Local Image Motion Peer-reviewed

Hisanao Akima, Satoshi Moriya, Susumu Kawakami, Masafumi Yano, Koji Nakajima, Masao Sakurabah, Shigeo Sato

ARTIFICIAL NEURAL NETWORKS AND MACHINE LEARNING - ICANN 2016, PT I　9886　556-557　2016

ISSN： 0302-9743
Effects of interfacial chemical states on the performance of perovskite solar cells Peer-reviewed

Teng Ma, Daisuke Tadaki, Masao Sakuraba, Shigeo Sato, Ayumi Hirano-Iwata, Michio Niwano

JOURNAL OF MATERIALS CHEMISTRY A　4　(12)　4392-4397　2016

DOI： 10.1039/c5ta08098c 　

ISSN： 2050-7488

eISSN： 2050-7496
Hydrogen Atom Desorption Induced by Electron Bombardment on Si Surface Peer-reviewed

W. Li, S. Sato, H. Akima, M. Sakuraba

ECS Trans.　69　(31)　35-38　2015/12

DOI： 10.1149/06931.0035ecst 　
Depth Profiling of Group-IV Semiconductor Materials by X-Ray Photoelectron Spectroscopy (in Japanese) Invited Peer-reviewed

M. Sakuraba, H. Akima, S. Sato, J. Murota

Proceedings of Surface Analysis Research Conversazione (SHIMADZU CORPORATION, Hadano, Japan, Jun. 18-19, 2015)　6-1-6-9　2015/06/18
Publisher: Unpublished
DOI： 10.13140/RG.2.1.2125.3284 　
Superconductivity Coherence in Series Array of Nb/AlOx/Nb Josephson Junctions

Tohoku-Section Joint Convention Record of Institutes of Electrical and Information Engineers, Japan　2015　10-10　2015
Publisher: Organizing Committee of Tohoku-Section Joint Convention of Institutes of Electrical and Information Engineers, Japan
DOI： 10.11528/tsjc.2015.0_10 　
STMを用いた電子注入によるSi表面終端水素原子の脱離に関する研究

李武, 佐藤茂雄, 秋間学尚, 桜庭政夫

電気関係学会東北支部連合大会講演論文集　2015　140-140　2015
Publisher: 電気関係学会東北支部連合大会実行委員会
DOI： 10.11528/tsjc.2015.0_140 　
Izhikevich neuron circuit using stochastic logic Peer-reviewed

S. Sato, H. Akima, K. Nakajima, M. Sakuraba

ELECTRONICS LETTERS　50　(24)　1795-U157　2014/11

DOI： 10.1049/el.2014.3627 　

ISSN： 0013-5194

eISSN： 1350-911X
Performance analysis of Bidirectional Associative Memories by using the Inverse Function Delayless model

Shigeo Sato

IEICE Proceeding Series　2014/09/14

DOI： 10.34385/proc.46.C2L-C3 　
Epitaxial growth of Si-1 (-) Ge-x(x) alloys and Ge on Si(100) by electron-cyclotron-resonance Ar plasma chemical vapor deposition without substrate heating Peer-reviewed

Naofumi Ueno, Masao Sakuraba, Junichi Murota, Shigeo Sato

THIN SOLID FILMS　557　31-35　2014/04

DOI： 10.1016/j.tsf.2013.11.023 　

ISSN： 0040-6090
Surface Reaction in Thin Film Formation of Si1-xGex Alloys on Si(100) by Electron-Cyclotron-Resonance Ar Plasma Chemical Vapor Deposition without Substrate Heating Peer-reviewed

Naofumi Ueno, Masao Sakuraba, Shigeo Sato

SIGE, GE, AND RELATED COMPOUNDS 6: MATERIALS, PROCESSING, AND DEVICES　64　(6)　99-105　2014

DOI： 10.1149/06406.0099ecst 　

ISSN： 1938-5862
Majority Neuron Circuit Having Large Fan-in with Non-volatile Synaptic Weight Peer-reviewed

Hisanao Akima, Yasuhiro Katayama, Koji Nakajima, Masao Sakuraba, Shigeo Sato

PROCEEDINGS OF THE 2014 INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS (IJCNN)　4266-4271　2014

DOI： 10.1109/IJCNN.2014.6889766 　

ISSN： 2161-4393
Epitaxial growth of heavily B-doped Si and Ge films on Si(100) by low-energy ECR Ar plasma CVD without substrate heating Peer-reviewed

Yusuke Abe, Shuji Kubota, Masao Sakuraba, Junichi Murota, Shigeo Sato

ECS Transactions　58　(9)　223-228　2013
Publisher: Electrochemical Society Inc.
DOI： 10.1149/05809.0223ecst 　

ISSN： 1938-6737 1938-5862
Formation and Characterization of Strained Si1-xGex Films Epitaxially Grown on Si(100) by Low-Energy ECR Ar plasma CVD without Substrate Heating Peer-reviewed

Naofumi Ueno, Masao Sakuraba, Junichi Murota, Shigeo Sato

ULSI PROCESS INTEGRATION 8　58　(9)　207-211　2013

DOI： 10.1149/05809.0207ecst 　

ISSN： 1938-5862
逆関数遅延ネットワークを用いた最適化問題解探索のための高次形式エネルギー関数設計法 Peer-reviewed

曽田尚宏, 早川吉弘, 佐藤茂雄, 中島康治

電子情報通信学会論文誌Ａ　J96-A　(1)　12-21　2013/01/01
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5707
Dynamic characteristics of a simple bursting neuron model Peer-reviewed

Koji Nakajima, Shigeo Sato, Yoshihiro Hayakawa

Nonlinear Theory and Its Applications, IEICE　3　(3)　436-456　2012/07/01
Publisher: The Institute of Electronics, Information and Communication Engineers
DOI： 10.1587/nolta.3.436 　

ISSN： 2185-4106

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We present a simple neuron model that shows a rich property in spite of the simple structure derived from the simplification of the Hindmarsh-Rose, the Morris-Lecar, and the Hodgkin-Huxley models. The model is a typical example whose characteristics can be discussed through the concept of potential with active areas. A potential function is able to provide a global landscape for dynamics of a model, and the dynamics is explained in connection with the disposition of the active areas on the potential, and hence we are able to discuss the global dynamic behaviors and the common properties among these realistic models. The obtained outputs are broadly classified as simple oscillations, spiking, bursting, and chaotic oscillations. The bursting outputs are classified as with spike undershoot and without spike undershoot, and the bursts without spike undershoot are classified as with tapered and without tapered. We show the parameter dependence of these outputs and discuss the connection between these outputs and the potential with active areas.
Dynamic Characteristics of Neuron Models and Active Areas in Potential Functions Peer-reviewed

K. Nakajima, K. Kurose, S. Sato, Y. Hayakawa

IUTAM SYMPOSIUM ON 50 YEARS OF CHAOS: APPLIED AND THEORETICAL　5　49-53　2012

DOI： 10.1016/j.piutam.2012.06.007 　

ISSN： 2210-9838
Analysis of burst dynamics bound by potential with active areas Peer-reviewed

K. Kurose, Y. Hayakawa, S. Sato, K. Nakajima

Nonlinear Theory and Its Applications, IEICE　2　(4)　417-431　2011/10
Publisher: The Institute of Electronics, Information and Communication Engineers
DOI： 10.1587/nolta.2.417 　

ISSN： 2185-4106

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Burst firing dynamics that are observed in many neuron models including the Hodgkin-Huxley model, are explained in terms of a motion of a quasi particle bound by potential. We are able to foresee the solution landscape with the curvature of the potential, and can design the wave form of the output to properly set active areas on the potential. In this paper, we apply this concept for a single Hindmarsh-Rose model and a coupled van der Pol oscillators. Therefore, we provide an understanding of the burst firings with spatiotemporal constructions of the potential and the active areas, and claim that the active areas cause the eigen-oscillations individually. Hence, we dispose the active areas on the potential properly and design the intended wave forms. Then, the global curvature of the potential function ensures that these oscillations do not diverge.
4-bit SFQ Multiplier Based on Booth Encoder Peer-reviewed

Ryosuke Nakamoto, Sakae Sakuraba, Takeshi Onomi, Shigeo Sato, Koji Nakajima

IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY　21　(3)　852-855　2011/06

DOI： 10.1109/TASC.2010.2095814 　

ISSN： 1051-8223
An application of higher order connection to inverse function delayed network Peer-reviewed

T. Sota, Y. Hayakawa, S. Sato, K. Nakajima

Nonlinear Theory and Its Applications, IEICE　2　(2)　180-197　2011/04
Publisher: The Institute of Electronics, Information and Communication Engineers
DOI： 10.1587/nolta.2.180 　

ISSN： 2185-4106

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The Inverse function Delayed model (ID model) is a neuron model with negative resistance dynamics. The negative resistance can destabilize local minimum states, which are undesirable network responses. The ID network can remove these states. Actually, we have demonstrated that the ID network can perfectly remove all local minima with N-Queen problems or 4-Color problems, where stationary stable states always give correct answers. However this method cannot apply to Traveling Salesman Problems (TSPs) or Quadratic Assignment Problems (QAPs). Meanwhile, it is proposed that the TSPs are able to be represented in terms of the quartic form energy function. In this representation, the global minimum states that represent correct answers and the local minimum states are separable clearly, thus if it is applied to the ID network, it ensures that only the local minimum states are destabilized by the negative resistance. In this paper, we aim to introduce higher order connections to the ID network to apply the quartic form energy function. We apply the ID network with higher order connections to the TSPs or QAPs, and show that the higher order connection ID network can destabilize only the local minimum states by the negative resistance effect, so that it obtains only correct answers found at stationary stable states. Moreover, we obtain minimum parameter region analytically to destabilize every local minimum state.
Performance evaluation of adiabatic quantum computation using neuron-like interconnections Peer-reviewed

S. Sato, A. Ono, M. Kinjo, K. Nakajima

Nonlinear Theory and Its Applications, IEICE　2　(2)　198-204　2011/04
Publisher: The Institute of Electronics, Information and Communication Engineers
DOI： 10.1587/nolta.2.198 　

ISSN： 2185-4106

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Quantum computation algorithms indicate possibility that non-deterministic polynomial time problems can be solved much faster than classical methods. We have proposed a neuromorphic quantum computation algorithm based on adiabatic quantum computation, in which an analogy to an artificial neural network is considered in order to design a Hamiltonian. However, in the neuromorphic AQC, the relation between its computation time and success rate has not been clear. In this paper, we study residual energy and the probability of correct answers as a function of computation time. The residual energy behaves as expected from the adiabatic theorem. On the other hand, the success rate strongly depends on energy level crossings of excited states during Hamiltonian evolution. The results indicate that computation time must be adjusted according to a target problem.
High Throughput Parallel Arithmetic Circuits for Fast Fourier Transform Peer-reviewed

Ryosuke Nakamoto, Sakae Sakuraba, Alexandre Martins, Takeshi Onomi, Shigeo Sato, Koji Nakajima

IEICE TRANSACTIONS ON ELECTRONICS　E94C　(3)　280-287　2011/03

DOI： 10.1587/transele.E94.C.280 　

ISSN： 0916-8524

eISSN： 1745-1353
Higher Order Connections Network with Stochastic Logic for Optimization Problems

Tohoku-Section Joint Convention Record of Institutes of Electrical and Information Engineers, Japan　2011　4-4　2011
Publisher: Organizing Committee of Tohoku-Section Joint Convention of Institutes of Electrical and Information Engineers, Japan
DOI： 10.11528/tsjc.2011.0_4 　
Method of Solving Combinatorial Optimization Problems with Stochastic Effects

Takahiro Sota, Yoshihiro Hayakawa, Shigeo Sato, Koji Nakajima

NEURAL INFORMATION PROCESSING, PT III　7064　389-+　2011

DOI： 10.1007/978-3-642-24965-5_44 　

ISSN： 0302-9743
Method of Solving Combinatorial Optimization Problems with Stochastic Effects Peer-reviewed

Takahiro Sota, Yoshihiro Hayakawa, Shigeo Sato, Koji Nakajima

NEURAL INFORMATION PROCESSING, PT III　7064　389-+　2011

DOI： 10.1007/978-3-642-24965-5_44 　

ISSN： 0302-9743
Discrete Higher Order Neural Network for Solving Combinatorial Optimization Problems

T. Sota, Y. Hayakawa, S. Sato, K. Nakajima

The 3rd Student Organizing International Mini-Conference on Information Electronics Systems　143-144　2010/10
High Throughput Parallel Multiplier of SFQ Circuits based on the Booth Encoder

R. Nakamoto, S. Sakuraba, T. Onomi, S. Sato

The 3rd Student Organizing International Mini-Conference on Information Electronics Systems　172-173　2010/10
Performance of Adiabatic Quantum Computation using Neuron-like Interconnections

Shigeo Sato

IEICE Proceeding Series　39-42　2010/09/05

DOI： 10.34385/proc.44.A1L-C2 　
Analyses of Coupled Hindmarsh-Rose Type Bursting Oscillators

Shigeo Sato

IEICE Proceeding Series　619-622　2010/09/05

DOI： 10.34385/proc.44.C3L-D1 　
Discrete Higher Order Inverse Function Delayed Network

T. Sota, Y. Hayakawa, S. Sato, K. Nakajima

Proceedings of the 2010 International Symposium on Nonlinear Theory and its Applications　615-618　2010/09
Collective Dynamics of Intrinsic Josephson Junctions

Shigeo Sato, Koji Matsushita, Kunihiro Inomata, Huabing Wang, Takeshi Hatano, Mitsunaga Kinjo, Koji Nakajima

Extended Abstracts of 12th International Superconductive Electronics Conference　2009/06
Application of Single Electron Devices Utilizing Stochastic Dynamics Invited Peer-reviewed

Shigeo Sato, Koji Nakajima

International Journal of Nanotechnology and Molecular Computation　1　(2)　29-42　2009/04/01
Neuromorphic adiabatic quantum computation Peer-reviewed

Shigeo Sato, Mitsunaga Kinjo

Complex-Valued Neural Networks: Utilizing High-Dimensional Parameters　352-375　2009
Publisher: IGI Global
DOI： 10.4018/978-1-60566-214-5.ch014 　
Resonant activation and multi-junction switching characteristics of Bi-2212 intrinsic Josephson junctions

N. Kitabatake, K. Inomata, S. Sato, M. Kinjo, H.B. Wang, T. Hatano, K. Nakajima

2008 American Physics Society(APS) March Meeting　2008/03/10
Energy dissipation effect on a quantum neural network Peer-reviewed

Mitsunaga Kinjo, Shigeo Sato, Koji Nakajima

NEURAL INFORMATION PROCESSING, PART II　4985　730-+　2008

ISSN： 0302-9743
Study on the Performance of Neuromorphic Adiabatic Quantum Computation Algorithms Peer-reviewed

Aiko Ono, Shigeo Sato, Mitsunaga Kinjo, Koji Nakajima

2008 IEEE INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS, VOLS 1-8　2507-+　2008

DOI： 10.1109/IJCNN.2008.4634148 　

ISSN： 2161-4393
Resonant Activation and Multiple Switching Characteristics of Bi-2212 Intrinsic Josephson Junctions Peer-reviewed

N. Kitabatake, S. Sato, K. Inomata, M. Kinjo, H.B. Wang, T. Hatano, K. Nakajima

8th European Conference on Applied Superconductivity (EUCAS ‘07)　2007/09
Macroscopic quantum tunneling and resonant activation of current biased intrinsic Josephson junctions in Bi-2212 Invited Peer-reviewed

Shigeo Sato, Kunihiro Inomata, Mitsunaga Kinjo, Nobuhiro Kitabatake, Koji Nakajima, Huabing Wang, Takeshi Hatano

IEICE TRANSACTIONS ON ELECTRONICS　E90C　(3)　599-604　2007/03

DOI： 10.1093/ietele/e90-c.3.599 　

ISSN： 0916-8524

eISSN： 1745-1353
Study of macroscopic quantum tunnelling in Bi2Sr2CaCu2O8+delta intrinsic Josephson junctions Peer-reviewed

K. Inomata, S. Sato, M. Kinjo, N. Kitabatake, H. B. Wang, T. Hatano, Koji Nakajima

SUPERCONDUCTOR SCIENCE & TECHNOLOGY　20　(2)　S105-S109　2007/02

DOI： 10.1088/0953-2048/20/2/S20 　

ISSN： 0953-2048
Quantum neural network composed of Kane's qubits Peer-reviewed

Yuuki Nakamiya, Mitsunaga Kinjo, Osamu Takahashi, Shigeo Sato, Koji Nakajima

JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS　45　(10A)　8030-8034　2006/10

DOI： 10.1143/JJAP.45.8030 　

ISSN： 0021-4922
An STDP-type Learning by Minimizing K-L Divergence for a Spiking Neural Network Peer-reviewed

Shigeo Sato, Kun Ma, Koji Nakajima

Proceedings of 2006 International Symposium on Nonlinear Theory and its Applications　507-510　2006/09

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Hardware implementation of an inverse function delayed neural network using stochastic logic Peer-reviewed

Hongge Li, Yoshihiro Hayakawa, Shigeo Sato, Koji Nakajima

IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS　E89D　(9)　2572-2578　2006/09

DOI： 10.1093/ietisy/e89-d.9.2572 　

ISSN： 0916-8532
Study of Macroscopic Quantum Tunneling in Bi₂Sr₂CaCu₂O_8+#Gdelta#GR Intrinsic Josephson Junctions Invited Peer-reviewed

K. Inomata, S. Sato, M. Kinjo, Y. Nakamiya, N . Kitabatake, H. Wang, T. Hatano, K. Nakajima

Proc. 5th Int. Symp. Intrinsic Josephson Effect in High Tc Superconductors (Plasma 2006)　2006/07
Observation of Macroscopic Quantum Tunneling in Bi₂Sr₂CaCu₂O_8+#Gdelta#GR Intrinsic Josephson Junctions Invited Peer-reviewed

K. Inomata, S. Sato, M. Kinjo, Y. Nakamiya, N. Kitabatake, H. Wang, T. Hatano, K. Nakajima

Proc. The 8th International Conference on Materials and Mechanisms of Superconductivity and High Temperature Superconductors (M2S-HTSC-VIII)　2006/07
A study on learning with a quantum neural network

Mitsunaga Kinjo, Shigeo Sato, Koji Nakajima

IEEE International Conference on Neural Networks - Conference Proceedings　203-206　2006
Publisher: Institute of Electrical and Electronics Engineers Inc.
DOI： 10.1109/ijcnn.2006.246680 　

ISSN： 1098-7576
A study on learning with a quantum neural network Peer-reviewed

Mitsunaga Kinjo, Shigeo Sato, Koji Nakajima

2006 IEEE INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORK PROCEEDINGS, VOLS 1-10　203-+　2006

ISSN： 2161-4393
Neuromorphic quantum computation with energy dissipation Peer-reviewed

Mitsunaga Kinjo, Shigeo Sato, Yuuki Nakamiya, Koji Nakajima

Physical Review A - Atomic, Molecular, and Optical Physics　72　(5)　2005/11

DOI： 10.1103/PhysRevA.72.052328 　

ISSN： 1050-2947 1094-1622
Neuromorphic quantum computation with energy dissipation Peer-reviewed

M Kinjo, S Sato, Y Nakamiya, K Nakajima

PHYSICAL REVIEW A　72　(5)　52328　2005/11

DOI： 10.1103/PhysRevA.72.052328 　

ISSN： 2469-9926

eISSN： 2469-9934
Artificial Neural Network-inspired Quantum Adiabatic Evolution Algorithm with Energy Dissipation Peer-reviewed

Shigeo Sato

IEICE Proceeding Series　198-201　2005/10/18

DOI： 10.34385/proc.40.1-2-5-4 　

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Macroscopic quantum tunneling in a d-wave High-TC Bi2Sr2CaCu2O8+delta superconductor Peer-reviewed

K Inomata, S Sato, K Nakajima, A Tanaka, Y Takano, HB Wang, M Nagao, H Hatano, S Kawabata

PHYSICAL REVIEW LETTERS　95　(10)　2005/09

DOI： 10.1103/PhysRevLett.95.107005 　

ISSN： 0031-9007
MQT of Bi-2212 stacked Josephson junctions and its enhancement by microwave radiation Peer-reviewed

K. Inomata, S. Sato, M. Kinjo, Y. Nakamiya, K. Nakajima, A. Tanaka, Y. Takano, H. B. Wang, M. Nagao, T. Hatano

Abstracts of 7th European Conference on Applied Superconductivity　2005/09

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Macroscopic quantum tunneling in a d-wave High-TC Bi2Sr2CaCu2O8+delta superconductor Peer-reviewed

K Inomata, S Sato, K Nakajima, A Tanaka, Y Takano, HB Wang, M Nagao, H Hatano, S Kawabata

PHYSICAL REVIEW LETTERS　95　(10)　107005　2005/09

DOI： 10.1103/PhysRevLett.95.107005 　

ISSN： 0031-9007
Macroscopic quantum tunneling in d-wave high-Tc superconductor Peer-reviewed

K. Inomata, S. Sato, K. Nakajima, A. Tanaka, Y. Takano, H. Wang, M. Nagao, S. Kawabata, T. Hatano

2005 American Physics Society(APS) March Meeting　2005/03

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Basic property of a quantum neural network composed of Kane's qubits Peer-reviewed

Y Nakamiya, M Kinjo, O Takahashi, S Sato, K Nakajima

Proceedings of the International Joint Conference on Neural Networks (IJCNN), Vols 1-5　1104-1107　2005

DOI： 10.1109/IJCNN.2005.1556007 　

ISSN： 1098-7576
Single electron stochastic neural network Peer-reviewed

H Akima, S Yamada, S Sato, K Nakajima

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　E87A　(9)　2221-2226　2004/09

ISSN： 0916-8508

eISSN： 1745-1337
Implementation of continuous-time dynamics on stochastic neurochip Peer-reviewed

S Akimoto, A Momoi, S Sato, K Nakajima

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　E87A　(9)　2227-2232　2004/09

ISSN： 0916-8508

eISSN： 1745-1337
Single electron random number generator Peer-reviewed

H Akima, S Sato, K Nakajima

IEICE TRANSACTIONS ON ELECTRONICS　E87C　(5)　832-834　2004/05

ISSN： 0916-8524

eISSN： 1745-1353
Evaluation of junction parameters with control of carrier concentration in Bi<inf>2</inf>Sr<inf>2</inf>CaCu<inf>2</inf>O <inf>8+δ</inf> stacked junctions Peer-reviewed

Inomata, K., Sato, S., Nakajima, K., Kim, S.-J., Hatano, T., Takano, Y., Nagao, M., Yamashita, T.

Physica C: Superconductivity and its Applications　412-414　(SPEC. ISS.)　304　2004

DOI： 10.1016/j.physc.2003.12.102 　
A new digital architecture of inverse function delayed neuron with the stochastic logic Peer-reviewed

HG Li, Y Hayakawa, S Sato, K Nakajima

2004 47TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II, CONFERENCE PROCEEDINGS　393-396　2004
A study on neuromorphic quantum computation Peer-reviewed

S Sato, M Kinjo, O Takahashi, Y Nakamiya, K Nakajima

2004 IEEE INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS, VOLS 1-4, PROCEEDINGS　3253-3256　2004

DOI： 10.1109/IJCNN.2004.1381200 　

ISSN： 1098-7576
Implementation of a large scale hardware neural network system based on stochastic logic Peer-reviewed

A Momoi, S Akimoto, S Sato, K Nakajima

2004 IEEE INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS, VOLS 1-4, PROCEEDINGS　2671-2675　2004

DOI： 10.1109/IJCNN.2004.1381070 　

ISSN： 1098-7576
Design of single electron circuitry for a stochastic logic neural network Peer-reviewed

H Akima, S Sato, K Nakajima

KNOWLEDGE-BASED INTELLIGENT INFORMATION AND ENGINEERING SYSTEMS, PT 1, PROCEEDINGS　3213　1010-1016　2004

ISSN： 0302-9743
Electrical transport characteristics of Bi2Sr2CaCu2O8+δ stacked junctions with control of the carrier density Peer-reviewed

Kunihiro Inomata, Takeshi Kawae, Sang-Jae Kim, Kensuke Nakajima, Tsutomu Yamashita, Shigeo Sato, Koji Nakajima, Takeshi Hatano

Superconductor Science and Technology　16　(12)　1365-1367　2003/12

DOI： 10.1088/0953-2048/16/12/009 　

ISSN： 0953-2048
Intrinsic properties of cross-whisker junction Peer-reviewed

K. Inomata, Y. Takano, T. Hatano, S. Sato, K. Nakajima, S. Kawakami, M. Nagao, T. Yamashita, M. Tachiki

Abstracts of Second East Asia Symposium on Superconductive Electronics　68　2003/11

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An approach for quantum computing using adiabatic evolution algorithm Peer-reviewed

S Sato, M Kinjo, K Nakajima

JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS　42　(11)　7169-7173　2003/11

DOI： 10.1143/JJAP.42.7169 　

ISSN： 0021-4922
Implementation of a new neurochip using stochastic logic Peer-reviewed

S Sato, K Nemoto, S Akimoto, M Kinjo, K Nakajima

IEEE TRANSACTIONS ON NEURAL NETWORKS　14　(5)　1122-1127　2003/09

DOI： 10.1109/TNN.2003.816341 　

ISSN： 1045-9227
Electrical Transport Characteristics of Bi₂Sr₂CaCu₂O_8+δ Stacked Junctions with Control of the Carrier Density Peer-reviewed

K. Inomata, T. Kawae, S.-J. Kim, K. Nakajima, T. Yamashita, S. Sato, Koji Nakajima, Takeshi Hatano

Extended Abstracts of 9th International Superconductive Electronics Conference　PWe-03　2003/07

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Quantum adiabatic evolution algorithm for a quantum neural network Peer-reviewed

M Kinjo, S Sato, K Nakajima

ARTIFICAIL NEURAL NETWORKS AND NEURAL INFORMATION PROCESSING - ICAN/ICONIP 2003　2714　951-958　2003

ISSN： 0302-9743
Analysis and Measurement of Limit Cycles Generated on Neural Networks with Cyclic and Longer Connections Peer-reviewed

Yoshihiro Hayakawa, Shiya Suenaga, Shigeo Sato, Koji Nakajima

Proceedings 2002 International Symposium on Nonlinear Theory and its Applications　315-318　2002/10
Hardware Implementation of a Single Electron Neural Network Peer-reviewed

Hisanao AKIMA, Saiboku YAMADA, Shigeo SATO, Koji NAKAJIMA

Proceedings 2002 International Symposium on Nonlinear Theory and its Applications　913-916　2002/10
Learning Algorithm for the Threshold of Nonmonotonic Neurons Composing a Boltzmann Machine Peer-reviewed

Takuya HAGA, Fumihiko ISHIDA, Mitsunaga KINJO, Shigeo SATO, Koji NAKAJIMA

Proceedings 2002 International Symposium on Nonlinear Theory and its Applications　687-690　2002/10
Implementation of a new stochastic neurochip and a study on transitions between limit cycles by stochastic noise Peer-reviewed

Shunsuke Akimoto, Ken Nemoto, Shigeo Sato, Yoshihiro Hayakawa, Koji Nakajima

Proceedings 2002 International Symposium on Nonlinear Theory and its Applications　917-920　2002/10
Advantage and Disadvantage of the Quantum Adiabatic Evolution Algorithm for Combinatorial Optimization Problems Peer-reviewed

Mitsunaga Kinjo, Shigeo Sato, Koji Nakajima

Proceedings of the 10th JST International Symposium on Quantum Computing(ISQC)　P-2　2002/03
Hardware implementation of a DBM network with non-monotonic neurons Peer-reviewed

M Kinjo, S Sato, K Nakajima

IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS　E85D　(3)　558-567　2002/03

ISSN： 0916-8532
Evaluation of the Quantum Adiabatic Evolution Algorithm Peer-reviewed

M. Kinjo, S. Sato, K. Nakajima

Proc. Int. Symp. on Nonlinear Theory and Its Applications (NOLTA2001)　323-326　2001/10
A New Approach for Implementation of Analog Neurochips Peer-reviewed

S. Sato, M. Abe, T. Haga, M. Kinjo, K. Nakajima

Proc. Int. Symp. on Nonlinear Theory and Its Applications (NOLTA2001)　505-508　2001/10
A Non-monotonic Neurochip using Stochastic Logic Peer-reviewed

K. Nemoto, M. Kinjo, S. Sato, K. Nakajima

Proc. Int. Symp. on Nonlinear Theory and Its Applications (NOLTA2001)　605-608　2001/10
Hardware implementation of quantized connection neural networks Peer-reviewed

M. Abe, S. Sato, K. Nakajima

Proc. Int. Symp. on Nonlinear Theory and Its Applications (NOLTA2001)　617-620　2001/10
A Neural Network with Single Electron Neurons Peer-reviewed

H. Akima, S. Sato, K. Nakajima

Proc. Int. Symp. on Nonlinear Theory and Its Applications (NOLTA2001)　625-628　2001/10
Hardware Neural Networks with Single Electron Transistors Peer-reviewed

S. Sato, H. Akima, K. Nakajima

Proc. Int. Symp. on Nonlinear Theory and its Applications(NOLTA2000)　409-412　2000/09
Implementation of a Large Fan-in Majority Circuit Peer-reviewed

Y. Katayama, K. Suzuki, S. Sato, K. Nakajima

Proc. Int. Symp. on Nonlinear Theory and its Applications(NOLTA2000)　413-416　2000/09
New nonvolatile analog memories for analog data processing Peer-reviewed

T Harada, A Sato, M Kinjo, Y Katayama, S Sato, K Nakajima

JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS　39　(4B)　2291-2296　2000/04

DOI： 10.1143/JJAP.39.2291 　

ISSN： 0021-4922
Characteristics of small scale non-monotonic neuron networks having large potentiality for learning Peer-reviewed

M Kinjo, S Sato, K Nakajima

IJCNN 2000: PROCEEDINGS OF THE IEEE-INNS-ENNS INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS, VOL IV　171-174　2000

ISSN： 1098-7576
New Nonvolatile Analog Memories for Building Associative Memories Peer-reviewed

T. Harada, A. Sato, M. Kinjo, Y. Katayama, S. Sato, K. Nakajima

Ext. Abst. Int. Conf. on Solid State Devices and Materials(SSDM99)　1999　270-271　1999/09
A Study on DBM Network with Non-Monotonic Neurons Peer-reviewed

M. Kinjo, S. Sato, K. Nakajima

Proc. 1999 Int. Joint Conf. on Neural Networks(IJCNN99)(1999)　2065　1999/07
Integrated circuits of map chaos generators Peer-reviewed

H Tanaka, S Sato, K Nakajima

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　E82A　(2)　364-369　1999/02

ISSN： 0916-8508

eISSN： 1745-1337
A content-addressable memory using 'switched diffusion analog memory with feedback circuit' Peer-reviewed

T Harada, S Sato, K Nakajima

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　E82A　(2)　370-377　1999/02

ISSN： 0916-8508

eISSN： 1745-1337
Hardware integration for neural networks in RIEC Tohoku University Invited Peer-reviewed

K. Nakajima, S. Sato

Proc. 1998 Int. Conf. on Computers, Communications and Systems (ICCCS’98)　5-14　1998/11
A new floating-gate analog memory and an analog content-addressable memory for building a new intelligent system Peer-reviewed

T. Harada, S. Sato, K. Nakajima

Proc. of the Workshop on Synthesis And System Integration of Mixed Technologies (SASIMI’98)　256-263　1998/10
DBM Learning in Non-monotonic Neural Networks Peer-reviewed

M. Kinjo, S. Sato, K. Nakajima

Proc. Int. Symp. on Nonlinear Theory and its Applications(NOLTA98)　2　455-458　1998/09
Simple integrated circuits for a chaotic noise generator

H. Tanaka, S. Sato, K. Nakajima, E. Belhaire, P. Garda

Proc. 2nd R.I.E.C. International Symposium (DAIPS)　279-281　1998/03
On high learning ability of DBM with non-monotonic neurons

M. Kinjo, S. Sato, K. Nakajima

Proc. 2nd R.I.E.C. International Symposium (DAIPS)　287-290　1998/03
A Study on the Learning Ability of a DBM with Quantized Synapses Peer-reviewed

S. Sato, S. Shibata, K. Nakajima

Proc. Int. Symp. on Nonlinear Theory and its Applications(NOLTA97)　877-880　1997/12
Designs of Integrated Ciruit to Generate Map Chaos Peer-reviewed

H. Tanaka, S. Sato, K. Nakajima, E. Belhaire, P. Garda

Proc. Int. Symp. on Nonlinear Theory and its Applications(NOLTA97)　873-876　1997/12
LSI NEURAL CHIP OF PULSE-OUTPUT NETWORK WITH PROGRAMMABLE SYNAPSE Peer-reviewed

S SATO, M YUMINE, T YAMA, J MUROTA, K NAKAJIMA, Y SAWADA

IEICE TRANSACTIONS ON ELECTRONICS　E78C　(1)　94-100　1995/01

ISSN： 0916-8524

eISSN： 1745-1353
HARDWARE IMPLEMENTATION OF NEW ANALOG MEMORY FOR NEURAL NETWORKS Peer-reviewed

K NAKAJIMA, S SATO, T KITAURA, J MUROTA, Y SAWADA

IEICE TRANSACTIONS ON ELECTRONICS　E78C　(1)　101-105　1995/01

ISSN： 0916-8524

eISSN： 1745-1353
A Pulsating Neural Network Peer-reviewed

Hyo Sig Won, Shigeo Sato, Koji Nakajima, Yasuji Sawada

Ext. Abst. Int. Conf. on Solid State Devices and Materials (SSDM94)　379-381　1994/08
Study on the Instability of Silicon Surfaces through Anodization Peer-reviewed

M. Hayashi, Y. Hayakawa, S. Sato, Y. Sawada

Ext. Abst. Int. Conf. of Advanced Microelectronic Devices and Processing (AMDP)　377-382　1994/03
A Pulse-Output DBM Chip with New Analog-Synapses Peer-reviewed

S. Sato, H. S. Won, N. Koizumi, Y. Hayakawa, J. Murota, K. Nakajima, Y. Sawada

Ext. Abst. Int. Conf. of Advanced Microelectronic Devices and Processing (AMDP)　647-650　1994/03
Switched Diffusion Analog Memory for Neural Networks and Its Application to an Analog DBM Chip Peer-reviewed

S. Sato, T. Kitaura, H. S. Won, Y. Hayakawa, J. Murota, K. Nakajima, Y. Sawada

Proc. Int. Symp. on Nonlinear Theory and its Applications (NOLTA93)　181-186　1993/12
Switched Diffusion Analog Memory for Neural Networks Peer-reviewed

T. Kitaura, S. Sato, J. Murota, K. Nakajima, Y. Sawada

Ext. Abst. Int. Conf. on Solid State Devices and Materials (SSDM93)　449-451　1993/08
LSI Implementation of Pulse-Output Neural Network with Programmable Synapse Peer-reviewed

S. Sato, M. Yumine, T. Yama, J. Murota, K. Nakajima, Y. Sawada

Proc. IEEE/INNS Int. Joint. Conf. Neural Networks(IJCNN92)　1　173-177　1992/06
Implementation of a class of asymmetrical neural networks with application to A/D converter Peer-reviewed

佐藤茂雄, 西村聡彦, 室田淳一, 中島康治, 澤田康次

電子情報通信学会論文誌　J75-C2　(2)　103-111　1992/02/01
Publisher:
ISSN： 0915-1907

Show all ︎Show first 5

Misc. 129

マルコフ連鎖モデルによる神経細胞ネットワークの構造機能相関解析

門間信明, 山本英明, 藤原直哉, 佐藤茂雄

電子情報通信学会技術研究報告　124　(194)　41-44　2024/09/20
Publisher: 電子情報通信学会
ISSN： 2432-6380
STDP則のアナログCMOS回路実装と分類タスクへの応用

飯田陽介, 守谷哲, 山本英明, 佐藤茂雄

電子情報通信学会技術研究報告　124　(194)　29-32　2024/09/20
Publisher: 電子情報通信学会
ISSN： 2432-6380
脳組織に近い弾性率を有するシリコーン樹脂の生体界面材料応用

山本英明, 住拓磨, 佐藤茂雄, 平野愛弓

Molecular Electronics and Bioelectronics　31　(2)　77-80　2020/05
Publisher: 応用物理学会有機分子・バイオエレクトロニクス分科会
ISSN： 2423-8805
Quantitative Analysis of Dynamical Complexity in Cultured Neuronal Network Models for Reservoir Computing Applications Peer-reviewed

Satoshi Moriya, Hideaki Yamamoto, Ayumi Hirano-Iwata, Shigeru Kubota, Shigeo Sato

2019 International Joint Conference on Neural Networks (IJCNN)　2019/07
Publisher: IEEE
DOI： 10.1109/ijcnn.2019.8852207 　
Analog spintronics devices and its application to artificial neural networks

117　(247)　7-12　2017/10/19
Publisher: 電子情報通信学会
ISSN： 0913-5685
Analog spintronics devices and its application to artificial neural networks

41　(34)　7-12　2017/10
Publisher: 映像情報メディア学会
ISSN： 1342-6893
Variation in spontaneous activity patterns in modular neuronal network models

116　(521)　133-136　2017/03/13
Publisher: 電子情報通信学会
ISSN： 0913-5685
運動視により局所運動を検出する神経回路網モデルのLSI化

秋間学尚, 佐藤茂雄

日本神経回路学会誌　22　(4)　152-161　2016/12/05
Publisher: Japanese Neural Network Society
DOI： 10.3902/jnns.22.152 　

ISSN： 1340-766X
Investigation of network structure and synchronous activity in modularly-structured neuronal network models

116　(313)　33-38　2016/11/18
Publisher: 電子情報通信学会
ISSN： 0913-5685
A Study on Synaptic Weight Resolution in Hardware Implementation of Deep Neural Network

116　(59)　23-28　2016/05/21
Publisher: 電子情報通信学会
ISSN： 0913-5685
C-8-20 A Study on Adiabatic Quantum Computation with a Brain-inspired Learning Rule

Osakabe Yoshihiro, Sato Shigeo, Akima Hinasao, Sakuraba Masao, Kinjo Mitsunaga

Proceedings of the IEICE General Conference　2016　(2)　48-48　2016/03/01
Publisher: The Institute of Electronics, Information and Communication Engineers
D-2-5 LSI Design of a Neural Network Model for Detecting Planar Surface Spatially from Local Image Motion

Moriya Satoshi, Akima Hisanao, Kawakami Susumu, Yano Masafumi, Nakagima Koji, Sakuraba Masao, Sato Shigeo

Proceedings of the IEICE General Conference　2016　(1)　11-11　2016/03/01
Publisher: The Institute of Electronics, Information and Communication Engineers
Design of Izhikevich neuron circuit using stochastic logic

115　(318)　31-34　2015/11/20
Publisher: 電子情報通信学会
ISSN： 0913-5685
D-2-6 LSI Design of a Neural Network Model for Detecting Local Image Motion by Motion Stereo Vision

Moriya Satoshi, Akima Hisanao, Kawakami Susumu, Yano Masafumi, Nakagima Koji, Sakuraba Masao, Sato Shigeo

Proceedings of the IEICE General Conference　2015　(1)　19-19　2015/02/24
Publisher: The Institute of Electronics, Information and Communication Engineers
大脳皮質視覚野において局所運動を検出する神経回路網モデルのLSI化

秋間学尚, 守谷哲, 川上進, 矢野雅文, 中島康治, 櫻庭政夫, 佐藤茂雄

信学技報　NC2015-4　57-62　2015
An LSI Implementation of a Neural Network Model for Detecting Local Image Motion in the Visual Cortex

秋間学尚, 守谷哲, 川上進, 矢野雅文, 中島康治, 櫻庭政夫, 佐藤茂雄

IEICE Technical Report　NC2015-4　57-62　2015
A simulation study of a neural network model for detecting planar surface by motion stereo vision

AKIMA Hisanao, KAWAKAMI Susumu, NAKAJIMA Koji, SAKURABA Masao, SATO Shigeo

IEICE technical report. Neurocomputing　114　(326)　97-100　2014/11/21
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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The spatial perception, in which objects motion and positional relation are recognized, is necessary to realize such as a walking robot and an autonomous car. Although conventional methods require enormous computational resources (CPU speed, memory capacity) to process the spatial perception in real time, animals can do with less resources based on visual information. We focus on motion stereo vision, which is adopted even by insects and birds, and aim to construct a low-power spatial perception system by implementing the neural network model proposed by Kawakami et.al. as a LSI. In this study, we reduce memory capacity and operation amount so as to fit in a LSI and show cell responses of the model using computer simulation.
Learning Restricted Boltzmann Machine with discrete learning parameter

SHINAGAWA Sitaro, HAYAKAWA Yoshihiro, SATO Shigeo, ONOMI Takeshi, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　114　(113)　37-40　2014/06/30
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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Recently, the method of Deep Neural Network (DNN) with hierarchical learning has been remarkable for performance to solve various complex tasks in machine learning, called " Deep Learning". Pre-training for every two layers by using Restricted Boltzmann Machine (RBM) or auto-encoder (AE) is efficient and frequently used for constructing DNN. However, it takes longer time for learning. To solve this problem, we can select parallel computation by developing LSI chips. LSI chips have however limited area for Memory, it is not easy to apply them to big data processing. We show that learning of Deterministic RBM (DRBM) with discrete value of learning parameter (weight, bias) is efficient to solve this problem, and this method still has capability to create good DNN.
Study on the hardware of the Bidirectional Associative Memories by using the Inverse Function Delayless model

BAO Chunyu, ONOMI Takeshi, HAYAKAWA Yoshihiro, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　114　(113)　31-36　2014/06/30
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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In conventional macro models such as the Hopfield model, the problems that are caused by the solution of the network not to escape from a local minimum such as spurious memory has been known. As Inverse Function Delayless model, we proved that the problem can be avoided by realizing the destabilization due to acceleration region. Moreover, by allowing a discrete operation, the convergence speed of the network is sufficiently fast. In this study, We introduce the effect of IDL to the associative memory system of hetero associative type and analyse the performance of the neural network. It is proved that the the effects of the IDL can be fulfilled. In this system the Basin size is expanded and the speed of convergence time to the memory state is improved. Then, in order to utilize, we try to implement the BAM System with the IDL effect by FPGA.
A-2-18 FPGA Implementation of a Discrete HC-ID Neural Network

Matsui Kosuke, Hayakawa Yoshihiro, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2014　43-43　2014/03/04
Publisher: The Institute of Electronics, Information and Communication Engineers
Study on the hardware of neural associative memory with a broad basin

Jiang Jing, Hayakawa Yoshihiro, Satou Shigeo, Nakajima Kouji

IEICE technical report. Nonlinear problems　113　(383)　99-102　2014/01/21
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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Because associative operation of the Hopfield neural network model are trapped in spurious memory, the association performance of the Hopfield neural network is reduced. In order to crush spurious memory, the inverse function delay model (ID) has been proposed, it introduced a negative resistance region, by destabilizing the patterns in spurious memory, it achieved convergence to the learned pattern. However, there is a disadvantage that ID model has two time constants, and hence the calculation cost increased. The inverse function delayless (IDL) model [1] are proposed for maintaining a broad basin size, in order to reduce the computational cost. In this text, the process of recall (overlap), the basin size and the calculation steps of IDL model are verified.
DTN routing method by using neural network

SASAKI Daisuke, HAYAKAWA Yoshihiro, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　113　(383)　41-44　2014/01/21
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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A Disruption tolerant Network (DTN) is studied as a communicating technique for the time when a network infrastructure was destroyed by disasters. In DTN, mobility node carries data among isolated networks, and they can communicate with each other. In addition, Efficient scheduling of the mobility node is required. However, this scheduling is a kind of optimization problem,and exploration of optimal solutions is difficult to obtain in practical time. On the other hand, the neural network has been proposed as a technique to solve the optimization problem at high speed. In this study,we propose a routing method of a mobility node visiting multiple nodes and report the simulation results.
Solving Optimization Problems Using DS-net and IDL model

WATANABE Yuto, HAYAKAWA Yoshihiro, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　113　(383)　45-50　2014/01/21
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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The Inverse function DelayLess (IDL) model has been proposed as one of novel neural models. Since the IDL model can set the approximate unstable region in the output space due to the two effects of the acceleration function and the difference of the equation, it is an effective tool to avoid local minimum problems for the purpose of searching a best solution of combinatorial optimization problem(COP). However, the COP including a cost function, as typified by the Traveling Salesman Problem, required the higher order synapse connections, hence it was serious problem that both the number of synapse connections and calculation time increase rapidly. In this study, we tried to overcome these problems to use the DS-net which has a network with constraints terms and a cost term. Consequentially we achieved 100% success rate by avoiding local minima perfectly and also succeeded to make the calculation time significantly short.
逆関数ゼロ遅延モデルを用いたニューラルネットワークの学習 (非線形問題)

堀内優太, 早川吉弘, 佐藤茂雄, 中島康治

電子情報通信学会技術研究報告 = IEICE technical report : 信学技報　113　(383)　73-76　2014/01/21
Publisher: 一般社団法人電子情報通信学会
ISSN： 0913-5685

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生物本来のニューロンに基づいたニューロンモデルの一つとして,逆関数遅延モデル(IDモデル)が提案されている.これは発信能力を持つニューロンモデルで,一部の組み合わせ最適化問題における極小値問題の完全回避が可能である.しかしながらIDモデルは計算コストが大きい問題があった.そのため大規模な問題にIDモデルを適用するのは困難であった.この問題は逆関数ゼロ遅延モデル(IDLモデル)の提案により,組み合わせ最適化問題においては改善された.しかしIDLモデルの学習性能についてはまだ議論されていない.そこで本研究はIDLモデルに階層型ネットワークを構築し,バックプロパゲーション(BP)学習の導出を検討する.
Effectiveness of The Inverse Function Delayless(IDL)Model in DS-net

Watanabe Yuto, Hayakawa Yoshihiro, Sato Shigeo, Nakajima Koji

Proceedings of the Society Conference of IEICE　2013　30-30　2013/09/03
Publisher: The Institute of Electronics, Information and Communication Engineers
DTN routing method by Using Higher-Order Inverse function Delayed networks

Sasaki Daisuke, Hayakawa Yoshihiro, Sato Shigeo, Nakajima Koji

Proceedings of the Society Conference of IEICE　2013　21-21　2013/09/03
Publisher: The Institute of Electronics, Information and Communication Engineers
A-2-10 逆関数ゼロ遅延モデルによる連想記憶の性能評価(A-2.非線形問題,一般セッション)

蒋靖, 早川吉弘, 佐藤茂雄, 中島康治

電子情報通信学会ソサイエティ大会講演論文集　2013　29-29　2013/09/03
Publisher: 一般社団法人電子情報通信学会
Comparison of various configuration circuits in SFQ high-speed parallel multiplier

Yamada Akifumi, Onomi Takeshi, Sato Shigeo, Nakajima Koji

Proceedings of the Society Conference of IEICE　2013　(2)　29-29　2013/09/03
Publisher: The Institute of Electronics, Information and Communication Engineers
A-2-27 FPGA Implementation of a Discrete HC-ID Neural Network

Matsui Kosuke, Hayakawa Yoshihiro, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2013　54-54　2013/03/05
Publisher: The Institute of Electronics, Information and Communication Engineers
A-2-29 Inverse Function Delayless (IDL) Network

Watanabe Yuto, Hayakawa Yoshihiro, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2013　56-56　2013/03/05
Publisher: The Institute of Electronics, Information and Communication Engineers
A-2-30 Optimization of DTN Scheduling by Using Higher-Order Inverse function Delayed networks

Sasaki Daisuke, Hayakawa Yoshihiro, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2013　57-57　2013/03/05
Publisher: The Institute of Electronics, Information and Communication Engineers
C-8-2 Comparison of partial product adder circuit in SFQ high-speed parallel multiplier

Yamada Akifumi, Onobi Takeshi, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2013　(2)　33-33　2013/03/05
Publisher: The Institute of Electronics, Information and Communication Engineers
Designing Method of Energy Functions for Solving Combinatorial Optimization Problems by Using the Inverse Function Delayed Network with Higher-Order Connections

T. Sota, Y. Hayakawa, S. Sato, K. Nakajima

Trans. IEICE　J96-A　(1)　12-21　2013
Hardware Implementation of the Discrete Inverse-function Delayed Network with Higher Order Synaptic Connections

Matsui Kosuke, Hayakawa Yoshihiro, Sato Shigeo, Nakajima Kozji

IEICE technical report. Nonlinear problems　112　(363)　61-64　2012/12/17
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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The HC-ID network has been proposed as a network model that avoids local minima when it is applied to combinatorial optimization problems using HDL. We designed the HC-ID network that operates in discrete-time for easy implementation on FPGA. We report our design and related results.
Optimization of scheduling in Disruption-Tolerant Networks by Neural Network

Sasaki Daisuke, Hayakawa Yoshihiro, Sato Shigeo, Nakajima Koji

IEICE technical report. Nonlinear problems　112　(363)　65-68　2012/12/17
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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A Disruption tolerant Network (DTN) is studied as a communicating technique when a network infrastructure was destroyed by disasters.In DTN, mobility node carries data among isolated networks, and they can,be communicate with each other.In addition, Ecient scheduling of the mobility node is important. However, this scheduling is a kind of optimization problem,and exploration of optimal solutions is dificult in practical time.On the other hand, the neural network has been proposed as a technique to solve the optimization problem at high speed.In this study,applying the Higher-order inverse function delayed network to the scheduling of DTN mobility node,we attempted to explore the optimal solution.
Inverse Function Delayless (IDL) Model

Watanabe Yuto, Hayakawa Yoshihiro, Sato Shigeo, Nakajima Koji

IEICE technical report. Nonlinear problems　112　(363)　57-60　2012/12/17
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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The Inverse function Delayed (ID) model has been proposed as one of novel neural models. The ID model has the negative resistance effect in its dynamics, and we can destabilize undesirable states selectively by this effect. In the case of solving some combinatorial optimization problems that we can separate the equilibrium points of global minimum states and local minimum states, we can destabilize only local minimum states selectively by using negative resistance of the ID model. Accordingly, we can solve such problems at 100% success rate if the network state reaches the stationary state. However, in the Inverse function Delayed network with higher-order connections that we introduce the higher-order synapse connections to the ID model, iteration time of simulation increases with introducing the higher-order connection, so in the case of solving big size problems, we cannot solve those in real-time. In this report, we propose the Inverse function DelayLess (IDL) model for reducing the convergence time by making delays of ID model zero and discuss its effects with simulations.
量子ニューロコンピューティングとその応用

佐藤茂雄, 金城光永

Journal of the Society of Instrument and Control Engineers　51　(4)　364-369　2012/04/10
Publisher: The Society of Instrument and Control Engineers
ISSN： 0453-4662
Designing method of Energy Functions for Solving Combinatorial Optimization Problems by the Network with Higher-order Connections

SOTA Takahiro, HAYAKAWA Yoshihiro, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　111　(498)　39-44　2012/03/20
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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We have proposed the Inverse function Delayed network with Higher order synaptic Connections (HC-ID network) to solve various combinatorial optimization problems such as the Traveling Salesman Problems (TSP) and the Quadratic Assignment Problems (QAP), etc. By using this method, we can select the solutions that are shown by the network state at stable states according to the cost of the solutions. Thus it is considered the HC-ID network is powerful tool for solving combinatorial optimization problems. However, this method cannot be applied to other problems because the energy function that represents the applied problem has some restrictions about the structure or the order of the synaptic connections. In this report, we expand the energy function of higher-order form to apply the HC-ID network to solve any other problems. We also apply the network to solve a scheduling problem by using the improved energy function.
C-8-1 COLLECTIVE DYNAMICAL PROPERTY OF JOSEPHSON JUNCTIONS

Katayama Hideaki, Inomata Kunihiro, Onomi Takeshi, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2012　(2)　28-28　2012/03/06
Publisher: The Institute of Electronics, Information and Communication Engineers
D-2-9 DEFENSE OF THESIS SCHEDULING PROBLEM AND ITS SOLDER SYSTEM

Sota Takahiro, Hayakawa Yoshihiro, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2012　(1)　17-17　2012/03/06
Publisher: The Institute of Electronics, Information and Communication Engineers
Higher order neural network with stochastic logic

SOTA Takahiro, HAYAKAWA Yoshihiro, SATO Shigeo, NAKAJIMA Koji

IEICE technical report　110　(465)　149-152　2011/03/03
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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We have proposed the method to solve various combinatorial optimization problems such as Traveling Salesman Problems (TSP) or Quadratic Assignment Problems (QAP) by using a neural network with higher order synaptic connections. We present a quartic form energy function for 3rd order connection networks, and the equilibrium points of optimal solution states and the other states are separable on the energy function. Therefore the higher order connection network can destabilize any states except the optimal solution states by the dynamics of neuron model, and we can obtain only optimal solutions. We consider that the optimization system of the higher order connection network and implementation of the network on the hardware are useful. In this report, we introduce the stochastic logic to calculation of the higher order connections in preparation for the hardware implementation.
C-8-5 Performance Comparison Among SFQ CLA's Designed by Parallel Summation Algorithms

Nakamoto Ryosuke, Onomi Takeshi, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2011　(2)　31-31　2011/02/28
Publisher: The Institute of Electronics, Information and Communication Engineers
A-2-17 Behavior of Coupled van der Pol oscillators Implemented on an Electronic Circuit

Tsuboi Taiki, Kurose Koji, Hayakawa Yoshihiro, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2011　58-58　2011/02/28
Publisher: The Institute of Electronics, Information and Communication Engineers
A-2-33 Synchronization and quiescence occurred in coupled bursting oscillators

Kurose Koji, Hayakawa Yoshihiro, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2011　74-74　2011/02/28
Publisher: The Institute of Electronics, Information and Communication Engineers
A-2-11 ID model Neural Network with Refractory Period to solve N-Queen problem.

Miyahara Jun, Sota Takahiro, Hayakawa Yoshihiro, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2011　52-52　2011/02/28
Publisher: The Institute of Electronics, Information and Communication Engineers
Solving Method of Combinatorial Optimization Problems Based on Quartic Form Energy Function for Larger Problems

SOTA Takahiro, HAYAKAWA Yoshihiro, SATO Shigeo, NAKAJIMA Koji

IEICE technical report　110　(299)　11-16　2010/11/12
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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We have proposed the Inverse function Delayed network with Higher order synaptic Connection (HC-ID network) to solve various combinatorial optimization problems such as the Traveling Salesman Problems (TSP) or the Quadratic Assignment Problems (QAP). We present a quartic form energy function for HC-ID networks, and the equilibrium points of optimal solution states and the others are separable on the energy function. Therefore the HC-ID network can destabilize any states except the optimal solution states, and we can obtain only optimal solutions. However, it is difficult to apply large size problems to the HC-ID network because the computer simulation requires much time to simulate the higher order connection. There in this report, we aim to simplify the HC-ID network to solve larger problems by introducing the idea of the limit model.
Dynamical behavior of bursting oscillation in terms of spatiotemporal pattern of potential with active areas

KUROSE Koji, HAYAKAWA Yoshihiro, SATO Shigeo, NAKAJIMA Koji

IEICE technical report　110　(299)　7-10　2010/11/12
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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Various type models including Hodgkin-Huxley model express the firing dynamics of the biological neuron. These neuron models are described in the form of differential equations with heavy nonlinearity. They have common characteristics of spike oscillations. The dynamics of neuron models, which are depended on the bifurcation parameters and vary significantly at a critical point, are individually researched with the bifurcation theory. We have proposed Burst ID model with an addition one variable to ID model. It is a kind of Hodgkin-Huxley type model, and has burst firing and chaos dynamics with three variable. We are able to express these dynamics as a motion of a quasi particle in potential with active areas, and foresee either divergence or converge solution in terms of the curvature of the potential function and the landscape of solutions including the stability of equilibria. In this report, we analyze several burst dynamics of the Burst ID model based on the spatiotemporal structure of the potential with the active areas.
Discreat Time Inverse Function Delayed Network with Higher-Order Connections

SOTA Takahiro, KUROSE Koji, HAYAKAWA Yoshihiro, SATO Shigeo, NAKAJIMA Koji

IEICE technical report　109　(458)　131-136　2010/03/02
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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The Inverse function Delayed network with higher-order connection (HCID network) has been proposed to solve combinatorial optimization problems by using Inverse function Delayed model, which is one of the neuron models. The HCID network has quartic energy function. This quartic energy function is useful for solving the combinatorial optimization problems, because the equilibrium points of optimal solution states (the global minimum states) are correspond to vertexes of output space. Hence the HCID network can converges to only optimal solutions by destabilizing the network states except the vertexes of the output space with the negative resistance effects of the Inverse function Delayed model. However, the iteration times of simulation increase with increasing the higher-order connection, so it is necessary to use a hardware network to solve big size problems. In this report, therefore, we propose the discrete time HCID network as the preparation of hardware implementation. Moreover it is shown that this discrete time HCID network operates in the same way as the continuous time network.
Superconducting Neural Networks and the Application to the 4-Queen Problem

MAENAMI Yusuke, ONOMI Takeshi, HAYAKAWA Yoshihiro, SATO Shigeo, NAKAJIMA Koji

IEICE technical report　109　(458)　81-85　2010/03/02
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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A combination optimization problem is generally NP difficulty or NP completeness. When problem size becomes large, it is difficult for a von Neumann type computer being the mainstream now to calculate a solution within real time. Many researches using neural networks have been proposed and investigated for solving this problem. Such neural networks have been implemented with the semiconductor circuits. Although the operation speed of the semiconductor circuit has been accelerated by scaling down silicon devices, it is difficult to increase the integration density because of high power density. Compared with a semiconductor circuit, a superconducting circuit has the feature of low power consumption and high-speed processing. The superconducting circuit not only may be able to avoid the problem of the power consumption of a semiconductor circuit, but may be able to realize a still more highly efficient circuit. Our research purpose is to constitute a neural network using a superconducting circuit for solving an optimization problem. A neuron element using a superconductive coupled-SQUID has been already proposed. In this research, we construct a neural network using the coupled-SQUIDs to solve a 4-Queen problem, moreover, we investigate the dynamics in numerical simulations.
Behavior of coupled oscillators in a quadratic potential with active area

KUROSE Koji, SOTA Takahiro, HAYAKAWA Yoshihiro, SATO Shigeo, NAKAJIMA Koji

IEICE technical report　109　(458)　109-113　2010/03/02
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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Neuron models express the dynamics of the biological neuron and there are various neuron models that are proposed and studied individually. The neuron models have common characteristics of the spike, and the burst firing that are observed in biological body. Generally, neuron models are represented in the form of multidimensional ordinary differential equations, and have the nonlinearity. Therefore neuron models are researched with the computer simulations and the bifurcation theory. However, it is so difficult that we discuss globally and make unfied understandings because of the nonlinearity. We have proposed a concept, and explained the dynamics of neuron models as a motion of quasi particles in potential with active area. In this paper, we apply the concept for coupled oscillators system and analyze the dynamics by using van der Pol oscillator.
C-8-18 Booth Encoder for Large Scale Integration SFQ Circuits

nakamoto Ryousuke, Sakuraba Sakae, Onomi Takeshi, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2010　(2)　56-56　2010/03/02
Publisher: The Institute of Electronics, Information and Communication Engineers
A-2-1 Parameter Characteristics of Solving Combinatorial Optimization Problems by Using Higher-Order Connection Neural Network

Sota Takahiro, Kurose Koji, Hayakawa Yoshihiro, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2010　45-45　2010/03/02
Publisher: The Institute of Electronics, Information and Communication Engineers
A-2-12 Analyses of the Dynamics of Interconnected van der Pol Oscillator based-on a Concept of Potential with Active Areas

Kurose Koji, Sota Takahiro, Hayakawa Yoshihiro, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2010　56-56　2010/03/02
Publisher: The Institute of Electronics, Information and Communication Engineers
Neuromorphic adiabatic quantum computation based on phosphorus nuclear spin array in Si

KINJO Mitsunaga, SATO Shigeo

IEICE technical report　109　(423)　1-3　2010/02/15
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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In this study, we discuss the operation and restrictions of the neuromorphic adiabatic quantum computation based on phosphorus nuclear spin array in Si.
Hopfield Network and Adiabatic Quantum Computation

SATO Shigeo, KINJO Mitsunaga, NAKAJIMA Koji

IEICE technical report　109　(269)　51-54　2009/11/04
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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Recent development of nano-technology makes possible to implement qubits. In this report, we consider a method to utilize a qubit as a neuron. Our research purpose is centered on the performance enhancement of neural networks by introducing quantum dynamics. First, we propose adiabatic Hamiltonian change for simulating energy dissipation. Next, a method which converts a synaptic coupling to a qubit coupling is proposed by relating a Hamiltonian with an energy function of a Hopfield network. Furthermore, we show the simulation results of the 4-queen problem and the relation to quantum annealing.
A-2-35 Relation between the computational power and the characteristics of Hamiltonians in neuromorphic adiabatic quantum computation

Ono Aiko, Sato Shigeo, Kinjo Mitsunaga, Nakajima Koji

Proceedings of the IEICE General Conference　2009　86-86　2009/03/04
Publisher: The Institute of Electronics, Information and Communication Engineers
CT-1-2 QUANTUM PROPERTY OF INTRINSIC JOSEPHSON JUNCTIONS

Sato Shigeo, Inomata Kunihiro, Wang Huabing, Hatano Takeshi, Kinjo Mitsunaga, Nakajima Koji

Proceedings of the IEICE General Conference　2009　(2)　"SS-12"-"SS-15"　2009/03/04
Publisher: The Institute of Electronics, Information and Communication Engineers
Macroscopic quantum tunneling on Josephson junctions of high-Tc superconductors

Shigeo Sato

OYO BUTURI　78　(1)　27-30　2009/01/10
Publisher: The Japan Society of Applied Physics
DOI： 10.11470/oubutsu.78.1_27 　
Study on the computational power of neuromorphic adiabatic quantum computation

ONO Aiko, SATO Shigeo, KINJO Mitsunaga, NAKAJIMA Koji

IEICE technical report　108　(240)　13-17　2008/10/07
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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Quantum computation algorithms indicate possibility that non-deterministic polynomial time (NP-time) problems can be solved much faster than by classical methods. Farhi et al. have proposed an adiabatic quantum computation (AQC) for solving the three-satisfiability problem (3-SAT). We have proposed a neuromorphic quantum computation algorithm based on AQC, in which an analogy to an artificial neural network (ANN) is considered to design a Hamiltonian. However, in the neuromorphic AQC, the relation between its computation time and the probability of correct answers is not clear yet. In this paper, we study both of residual energy and the probability of finding solution as a function of computation time. The results show that the performance of the neuromorphic AQC depends on the characteristic of Hamiltonians.
19aRD-6 Multiple switching characteristics of Bi-2212 intrinsic Josephson junctions

Kitabatake Nbuhiro, Inomata Kunihiro, Kinjoo Mitsunaga, Sato Shigeo, Wang Huabing, Hatano Takeshi, Nakajima Koji

Meeting abstracts of the Physical Society of Japan　62　(1)　774-774　2007/02/28
Publisher: The Physical Society of Japan (JPS)
ISSN： 1342-8349
11項ブレイン機能集積工学研究会(3節工学研究会,第5章国際会議・シンポジウム等)

中島康治, 佐藤茂雄, 早川吉弘

東北大学電気通信研究所研究活動報告　14　302-302　2007/01/01
CS-6-7 Quantum Property of Intrinsic Josephson Junctions in Bi-2212

Inomata Kunihiro, Sato Shigeo, Kinjo Mitsunaga, Kitabatake Nobuhiro, Wang Huabing, Hatano Takeshi, Nakajima Koji

Proceedings of the Society Conference of IEICE　2006　(2)　"S-22"-"S-23"　2006/09/07
Publisher: The Institute of Electronics, Information and Communication Engineers
11項ブレイン機能集積工学研究会(3節工学研究会,第5章国際会議・シンポジウム等)

中島康治, 佐藤茂雄, 早川吉弘

東北大学電気通信研究所研究活動報告　12　278-278　2006/08/01
A Study on Learning Algorithm for a Quantum Neural Network

KINJO Mitsunaga, SATO Shigeo, NAKAJIMA Koji

IEICE technical report　106　(102)　37-40　2006/06/09
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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A quantum neural network based both on the adiabatic quantum computation and the artificial neural network is one of candidates to overcome the difficulty for developing a quantum computation algorithm. In this paper, we propose a new learning method for a quantum neural network inspired by Hebb learning. Preliminary but successful results by numerical simulations have been shown. The results indicate that a quantum learning like Hebb rule can be implemented.
Macroscopic Quantum Tunneling in Bi2212 Intrinsic Josephson Junctions

INOMATA Kunihiro, SATO Shigeo, NAKAMIYA Yuuki, KINJO Mitsunaga, WANG Huabing, HATANO Takeshi, NAKAJIMA Koji

IEICE technical report　105　(575)　19-24　2006/01/20
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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It has been known that dissipation with quasi particles originated from the geometrical property of superconducting gap in high Tc superconductors may hinder the emergence of its quantum property. However, its successful observations have been reported recently. In this report, we show that the macroscopic quantum tunneling in Bi2212 intrinsic Josephson junctions. The critical temperature, at which quantum property emerges, is ten times higher than that of metallic superconductors. These results indicate the possibility for implementing qubits with high Tc superconductors.
11項ブレイン機能集積工学研究会(3節工学研究会,第5章国際会議・シンポジウム等)

中島康治, 佐藤茂雄, 早川吉弘

東北大学電気通信研究所研究活動報告　13　286-286　2006/01/01
A Study on Artificial Neural Network-inspired Quantum Computation and its Hardware Implementation

KINJO Mitsunaga, SATO Shigeo, NAKAMIYA Yuuki, NAKAJIMA Koji

IEICE technical report　105　(419)　47-51　2005/11/19
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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An artificial neural network(ANN)-inspired quantum computation, which is a new quantum computation algorithm based on both the ANN-like method and the adiabatic Hamiltonian evolution, has been proposed for solving a combinatorial optimization problem that its cost function is given in a quadratic form. However, the algorithm does not apply in a quantum system with degenerated states or level crossing during the evolution of a Hamiltonian. In order to remove this limitation, we propose an improved algorithm with energy dissipation and discuss how to use this algorithm for solving an optimization problem.
A new STDP type leaning rule derived by minimizing K-L distance for a spiking neural network

MA Kun, SATO Shigeo, NAKAJIMA Koji

IEICE technical report　105　(417)　31-34　2005/11/12
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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In this report, a new leaning rule for a spiking neural network is proposed. In recent years, the research of spiking neural networks (SNN) come to attention. As the background, the models of SNN resemble biological neurons, and spike timing dependent plasticity (STDP) was found in the biological neurons in 1998. The STDP is believed to strengthen synapses that are activated within 20-40ms before a postsynaptic spike and to weaken those that are activated within a similar time window after the spike. we have found a new leaning rule derived by minimizing Kullback-Leibler (K-L) distance, the learning rule can be applied to a spiking neural network, and we have confirmed the direct relation between the STDP and minimizing K-L distance.
Implementation of 1000 neuron hardware system based on stochastic logic and it's application

MOMOI Akiyoshi, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　104　(472)　37-42　2004/11/27
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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We have built a 1000 neuron hardware system based on stochastic logic. Stochastic logic realizes pseudo analog operations using stochastically coded digital pulses. Therefore, with using stochastic logic we can realize a smaller circuit than binary logic and higher reliability than an analog circuit. Furthermore, we can control the magnitude of the coding noise by changing the accumulation time, in order to enhance the performance. We report detail and some measurement results of our system.
The Design of Inverse Function Delayed Neuron with the Stochastic Logic

LI Hongge, HAYAKAWA Yoshihiro, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　104　(112)　29-34　2004/06/10
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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In this paper, we present a new digital architecture for neuron hardware that can be implemented using a field programmable gate array (FPGA). The proposed neuron provides a new neuron model of Inverse function Delayed. In order to decrease the circuit area, we employ a new architecture of inverse function with the stochastic logic. Since the property of stochastic logic, the scale of a circuit is smaller than a .conventional digital circuit. On the other hand, the stochastic logic requires the certain accumulation time for averaging. Therefore, the ID model of high-speed convergence remedy this shortcoming. The simulation experimental results show that the inverse function variance is relationship with the accumulation time, and this digital system can perform the associative memory.
A Study on Implementation of a Quantum Neural Network : For Utilization of a Qubit Operating like a Neuron

SATO Shigeo, KINJO Mitsunaga, NAKAJIMA Koji

The Journal of the Institute of Electronics, Information, and Communication Engineers　87　(6)　488-492　2004/06/01
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5693
SC-11-5 Implementation of a neurosystem using the stochastic logic and its expantion to the single-electron circuits

AKIMOTO Shunsuke, AKIMA Hisanao, MOMOI Akiyoshi, SATO Shigeo, NAKAJIMA Koji

Proceedings of the IEICE General Conference　2004　(2)　"S-60"-"S-61"　2004/03/08
Publisher: The Institute of Electronics, Information and Communication Engineers
D-2-4 Image Retrieve with a Stochastic Logic Neuron

SASAKI Takao, AKIMOTO Shunsuke, MOMOI Akiyoshi, HAYAKAWA Yoshihiro, SATO Shigeo, NAKAJIMA Koji

Proceedings of the IEICE General Conference　2004　(1)　14-14　2004/03/08
Publisher: The Institute of Electronics, Information and Communication Engineers
Structuring the 1000 neuron hardware system using stochastic neuro model and it's application

AKIMOTO Shunsuke, MOMOI Akiyoshi, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Neurocomputing　103　(466)　67-70　2003/11/22
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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In this paper, we introduce a large scale neural network system using VLSI chips which we designed. The chip designed on the basis of the 'stochastic logic', includes 64 neuron units. It realizes the continuous-time network dynamics and asyncronous updating of neuron states with reasonable circuit resources. Furthermore, we discuss incorporating non-monotonic neurons related to the performance enhancement of the system.
An Approach for Quantum Computing using Adiabatic Evolution Algorithm

Sato, S., Kinjo, M., Nakajima, K.

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers　42　(11)　7169-7173　2003/11/01

ISSN： 0021-4922
Association Property of an Inverse Delayed Neural Network

LI Hongge, AKIMOTO Shunsuke, HAYAKAWA Yoshihiro, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　103　(37)　19-24　2003/05/08
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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At present, the development of artificial neural network has obtained the satisfying success. Many models of neural network have been proposed and investigated. We have recently proposed a novel neuron model in a critical state. Theoretical investigations explain that the neuron of Inverse Delayed model has the advantage than conventional neuron models. In order to further discuss the fundamental characteristics of Inverse Delayed model, in the present study, we carry out the numerical experiment of storage capacity and dynamic behaviours on the ID model (Inverse Delayed Model) in detail. In order to compare the simulation results, we simulate the different neural network models separately including the Hopfield model, ID model and non-negative resistance ID model in the same condition. We further confirm the property of ID model through the simulation results. At last, we introduce an architecture of hardware that can be realized with stochastic logic.
A Study of the Integrated Time Series Associative System

Motoda Daisuke, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2003　(2)　201-201　2003/03/03
Publisher: The Institute of Electronics, Information and Communication Engineers
Implementation of Continuous Time Dynamics on a Stochastic Logic Neural Network

MOMOI Akiyoshi, AKIMOTO Shunsuke, SATO Shigeo, NAKAJIMA Koji

Proceedings of the IEICE General Conference　2003　(1)　16-16　2003/03/03
Publisher: The Institute of Electronics, Information and Communication Engineers
A Study on an Improved Quantum Algorithm by using the Neural Method

Kinjo Mitsunaga, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2003　"S-11"-"S-12"　2003/03/03
Publisher: The Institute of Electronics, Information and Communication Engineers
A proposal for a fully connected 1000 neuron network system by using stochastic neuro-chips

AKIMOTO Shunsuke, SATO Shigeo, NAKAJIMA Koji

Proceedings of the IEICE General Conference　2003　"S-5"-"S-6"　2003/03/03
Publisher: The Institute of Electronics, Information and Communication Engineers
Implementation of a Single Electron Neural Network

Akima Hisanao, Yamada Saiboku, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2003　(2)　100-100　2003/03/03
Publisher: The Institute of Electronics, Information and Communication Engineers
Hardware Implementation of Quantized Connection Nonmonotoinc Neural Networks and a Threshold Learning Algorithm

HAGA Takuya, ISHIDA Fumihiko, KINJO Mitsunaga, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Neurocomputing　102　(430)　67-72　2002/11/04
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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To realize high information processing ability of neural networks, implementing an integrated hardware with high speed is essential. To meet these requirements, we adopt two methods. One is weight quantization and another is introduction of nonmonotonic neurons. We consider a network with 3-value {-1,0,+1} weights, which has high capability of integration, but degrade the learning performance. To compensate the degradation, nonmonotonic neurons, which exhibit high learning ability, are introduced. However, the learning performance depends on a threshold which is one of the nonmonotonic neuron's parameter, and the optimum one depends on such as problems and network structures. Therefore, we propose a threshold learning algorithm and confirm the usefulness of the learning algorithm by numerical simulations. Moreover, we have implemented such quantized connection nonmonotonic neural networks with 20 neurons and 400 synapses including the learning module using analog circuits.
A Study on the Performance Enhancement of a Neurochip by Introducing Quantum Dynamics

SATO Shigeo, AKIMA Hisanao, YAMADA Saiboku, KINJO Mitsunaga, NAKAJIMA Koji

IEICE technical report. Neurocomputing　102　(430)　127-130　2002/11/04
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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In this paper, the performance enhancement of neurochips by introducing quantum dynamics is discussed. First, the neural network comprises single electron transistors is shown. Its performance has been evaluated by simulations. Next, we discuss a new adiabatic evolution algorithm employing a neural-like method. The possibility of performance enhancement by quantum dynamics is discussed.
Non-Linear Dynamics on the Stochastic Neuro System

AKIMOTO Shunsuke, NEMOTO Ken, SATO Shigeo, HAYAKAWA Yoshihiro, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　102　(68)　1-6　2002/05/13
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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We produce the Large Scale Integrated Neuronal Chip applied Stochastic Logic, and consider to operate the Non-symmetric Cyclic Connection on this chip. We confirm that the Limit-Cycles appears on the Stochastic Model with Non-symmetric Cyclic Connection. In addition, we observe the transition phenomenon between LimitCycles on it. In this paper, we discuss that phenomenon in detail. Consequently, it is found that the frequency of the transition is affected by the gain of the activation function. We also report the outcome of the measurement of the Chip.
A Study on Quantum Adiabatic Evolution Algorithms

SATO Shigeo, KINJO Mitsunaga, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　102　(68)　19-22　2002/05/13
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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A quantum computer employing a single quantum as a q-bit executes real parallel computation. It could be applied for various applications. There have been proposed several algorithms for quantum computation. However, these algorithms are applicable only for a limited number of applications. Therefore, a general purpose algorithm should be studied and developed for practical use in near future. In this paper, we focus on the adiabatic evolution algorithm for general purpose quantum computation and discuss how to use this algorithm for solving an optimization problem. Furthermore, we show a new algorithm incorporating a ANN-like method in order to compose another Hamiltonian. The new algorithm is helpful for reducing computation cost and is easy to implement. Successful simulation results are shown.
A study on the Transition betwaeen Limitcycles using Stochastic Logic

AKIMOTO Shunsuke, NEMOTO Ken, HAYAKAWA Yoshihiro, SATO Shigeo, NAKAJIMA Koji

Proceedings of the IEICE General Conference　2002　73-73　2002/03/07
Publisher: The Institute of Electronics, Information and Communication Engineers
Implementation of the Quantized Connection Neural Network

Abe Masao, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2002　79-79　2002/03/07
Publisher: The Institute of Electronics, Information and Communication Engineers
Large Scale Stochastic Neural System With Non-Monotonic Neurons

Nemoto K, Kinjo M, Sato S, Nakajima K

Proceedings of the IEICE General Conference　19-19　2002
Publisher: The Institute of Electronics, Information and Communication Engineers
Hardware implementation of a DBM network with non-monotonic neurons

Kinjo, M., Sato, S., Nakajima, K.

IEICE Transactions on Information and Systems　E85-D　(3)　558-567　2002/01/01

ISSN： 0916-8532
Weight Flip Algorithm of a Quantized Connection Nonmonotonic Neural Network

HAGA Takuya, KINJO Mitsunaga, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　101　(528)　21-27　2001/12/14
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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It is known that nonmonotonic neurons improve their learning and recall performance. But there have not been enough theoretical analyses and estimation. In this paper, we consider three(inputhidden-output)-layer neural networks which have quantized connections and nonmonotonic neurons, and propose the Weight Flip Algorithm by which we can obtain suitable quantized connection weights. We estimate the ability of the nonmonotonic neurons. It has been reported that by the Majority Algorithm, which has been proposed previously for monotonic neurons, we can solve the N-parity problem and also the N-inputs Boolean functions with N hidden monotonic neurons. On the other hand, only about N/2 hidden nonmonotonic neurons are required for the same problems by the Weight Flip Algorithm.
Limit Cycles of a Neural Network with Cyclic Connections and Measurement of an Integrated Neural Circuit

SUENAGA Shinya, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　101　(68)　13-18　2001/05/15
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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In this paper, we simulate limit cycles, which are sequences of dynamical state transitions generated on neural networks with cyclic connections, and show the relation between converged limit cycles and a number of neurons. The converged limit cycles are the states in which the neurons' group of high or low output appears alternatively in regular intervals. The length of the group depends on the kind of the limit, cycles. We explain the process of convergence from an initial condition to a limit cycle. And we have measured an integrated neural circuit in order to confirm our results.
Hardware Implementation of a Quantized Connection Nonmonotonic Neural Network

HAGA Takuya, KINJO Mitsunaga, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　101　(68)　1-6　2001/05/15
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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A Quantized Connection Neural Network (QCNN) has been proposed for integration of a huge number of elements. In this paper, we introduce the nonmonotonic neurons into the QCNN. Computer simulations show that DBM learning performance such as probability of successful convergence and convergence speed is improved. For hardware implementation, we also design the voltage mode nonmonotonic neuron circuit in which the gain and threshold are adjustable.
Digital Stochastic Neuron Chip with non-monotonic Neurons

NEMOTO Ken, KINJO Mitsunaga, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　101　(68)　7-12　2001/05/15
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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In order to realize a large scale neural computer by digital circuit, we incorporate stochastic logic in a digital neuron system. Furthermore, we incorporate a non-monotonic neuron in this system. There has been the report that the learning performance is improved with using non-monotonic neurons in comparison with the case of sigmoid neurons. In this paper, we show the design of such a network with DBM learning and discuss in comparison with a general digital system.
Characteristics of Limit Cycles Generated on Neural Networks with Cyclic Connections

SUENAGA Shinya, SATO Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2001　64-64　2001/03/07
Publisher: The Institute of Electronics, Information and Communication Engineers
Implementation of large fan-in majority gate and its application

Suzuki Kousuke, Sato Shigeo, Nakajima Koji

Proceedings of the IEICE General Conference　2001　(2)　125-125　2001/03/07
Publisher: The Institute of Electronics, Information and Communication Engineers
Implementation of Digital Stochastic Neurochip with Non-Montonic Neurons

Nemoto K., Kinjo M., Sato S., Nakajima K.

Proceedings of the IEICE General Conference　2001　(1)　7-7　2001/03/07
Publisher: The Institute of Electronics, Information and Communication Engineers
Nonmonotonic Neurons with Quantized Connections

HAGA Takuya, Kinjo MITUNAGA, SATO Shigeo, NAKAJIMA Koji

Proceedings of the IEICE General Conference　2001　(1)　8-8　2001/03/07
Publisher: The Institute of Electronics, Information and Communication Engineers
New nonvolatile analog memories for analog data processing

Harada, T., Sato, A., Kinjo, M., Katayama, Y., Sato, S., Nakajima, K.

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers　39　(4 B)　2291-2296　2000/12/01

ISSN： 0021-4922
A content-addressable memory using "switched diffusion analog memory with feedback circuit"

T Harada, S Sato, K Nakajima

ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING　25　(3)　337-346　2000/12

DOI： 10.1023/A:1008342301402 　

ISSN： 0925-1030
Integrated circuits of map chaos generators

H Tanaka, S Sato, K Nakajima

ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING　25　(3)　329-335　2000/12

DOI： 10.1023/A:1008390217331 　

ISSN： 0925-1030
Image processing by using majority gates based on CCI

SUZUKI Kousuke, KATAYAMA Yasuhiro, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　100　(381)　53-58　2000/10/13
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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Majority logic is an essential function in fault-tolerant systems, artificial neural networks and so on. When we take advantage of the majority function effectively, majority gates can provide a good performance for information processing. In this paper, we design a majority gate comprising current controled inverter which are easy to implement and operate in a binary voltage mode. We design a median filter using this majority gate, and it can process image filterings at high speed.
An LSI Fabrication of Quantized Connection Neural Networks and Its Learning

KATAYAMA Y., SATO S., NAKAJIMA K.

IEICE technical report. Nonlinear problems　100　(381)　29-36　2000/10/13
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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We propose a large fan-in majority circuit. The proposed circuit configulation is so simple that is implemented by standard CMOS technology. This circuit comprises N input parallel stages (N is the number of inputs and is able to be increased over 1000), an output-buffer and a reference voltage generator. An important application of the majority circuits is a formation of binary neural networks. It needs the huge number of neurons. Thefunctions of a binary neuron and a majority circuit are essentially the same. Therefore, the proposed circuit makes it possible to realize hardware implementation of such neural networks.
Implementation of a Stochastic Neural Network System

NEMOTO Ken, KINJO Mitsunaga, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　100　(32)　39-44　2000/05/03
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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In this paper, we discuss the effectiveness of stochastic logic for implementation of neural networks, and show the design of a such network with DBM learning function. One can convert analogue quantity to pulse firing rate by stochastic logic. In a stochastic logic system, the number of transistor in a chip can be reduced greatly since various complex operation can be done with basic logic gate. Furthermore, we incorporate a non-monotonic function as an activation function in this system and confirm higher learning ability compared to a usual one.
Design of a Neural Network with Single Electron Devices

AKIMA Hisanao, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　100　(32)　45-50　2000/05/03
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685

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In this report, we design a Hopfield network with neurons which are composed of CSET proposed by Tucker. Computer simulation based on Monte Carlo method has been done for the 4-Queen problem which is one of combinatorial optimization problems. The network operation based on a electron tunneling is stochastic. We confirm that the Hopfield network can escape from local minima due to its stochastic characteristic.
Effect of Chaotic Signal for a Neural Network with Cyclic Connections

TANAKA Hidetoshi, SATO Shigeo, NAKAJIMA Koji

Proceedings of the IEICE General Conference　2000　65-65　2000/03/07
Publisher: The Institute of Electronics, Information and Communication Engineers
Hardware implementation of quantized connection neural networks with on-chip learning

KATAYAMA Yasuhiro, SATO Shigeo, NAKAJIMA Koji

Proceedings of the IEICE General Conference　12-12　2000
Publisher: The Institute of Electronics, Information and Communication Engineers
Characteristics of small scale non-monotonic neuron networks having large potentiality for learning

M Kinjo, S Sato, K Nakajima

IJCNN 2000: PROCEEDINGS OF THE IEEE-INNS-ENNS INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS, VOL IV　4　171-174　2000

ISSN： 1098-7576
Study on DBM network with non-monotonic neurons

Mitsunaga Kinjo, Shigeo Sato, Koji Nakajima

Proceedings of the International Joint Conference on Neural Networks　4　2347-2350　1999/12/01
Chaos Circuits and LSI Implementation of Chaotic Neural Networks

Shigeo Sato, Koji Nakajima

Systems, control and information　43　(11)　577-583　1999/11/15
Publisher: Institute of Systems, Control and Information Engineers
DOI： 10.11509/isciesci.43.11_577 　

ISSN： 0916-1600
High speed CMOS majority gates and its application

SUZUKI Kousuke, KATAYAMA Yasuhiro, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　99　(412)　25-30　1999/11/05
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685
A study on chaotic signal for a neural network which generates limit cycles

TANAKA Hidetoshi, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　99　(412)　53-59　1999/11/05
Publisher: The Institute of Electronics, Information and Communication Engineers
ISSN： 0913-5685
Comparison of learning ability between monotonic and non-monotonic neuron networks

KINJO Mitsunaga, SATO Shigeo, NAKAJIMA Koji

Proceedings of the Society Conference of IEICE　1999　13-13　1999/08/16
Publisher: The Institute of Electronics, Information and Communication Engineers
Switched Diffusion Analog Memory with Feedback Circuit for Building Analog VLSI Systems

HARADA Tomochika, SATO Shigeo, NAKAJIMA Koji

Proceedings of the Society Conference of IEICE　1999　(2)　101-101　1999/08/16
Publisher: The Institute of Electronics, Information and Communication Engineers
Implementation of a non-monotonic neural network based on stochastic logic

Ohtaki Y., Sato S., Nakajima K.

Proceedings of the IEICE General Conference　1999　(1)　9-9　1999/03/08
Publisher: The Institute of Electronics, Information and Communication Engineers
Hardware Implementation of an Associative Memory with SDAM

Satoh A., Sato S., Nakajima K.

Proceedings of the IEICE General Conference　1999　(2)　181-181　1999/03/08
Publisher: The Institute of Electronics, Information and Communication Engineers
Design of a new CMOS majority gate which has very large fan-in capability

KATAYAMA Yasuhiro, SUZUKI Kousuke, SATO Shigeo, NAKAJIMA Koji

Proceedings of the Society Conference of IEICE　98-98　1999
Publisher: The Institute of Electronics, Information and Communication Engineers
Integrated circuits of map chaos generators

Tanaka, H., Sato, S.

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　E82-A　(2)　364-369　1999/01/01

ISSN： 0916-8508
A content-addressable memory using "switched diffusion analog memory with feedback circuit"

Harada, T., Sato, S.

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　E82-A　(2)　370-377　1999/01/01

ISSN： 0916-8508
A Study on Implementation of Non-Monotonic Neural Networks with DBM Learning

KINJO Mitsunaga, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　98　(145)　1-6　1998/06/25
Publisher: The Institute of Electronics, Information and Communication Engineers

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We reported the learning ability of a Deterministic Boltzmann Machine(DBM)which is a 2-3-1 network with non-monotonic neurons.The DBM network with non-monotonic neurons has high learning ability compared to the network with monotonic neurons.In this paper, we report the learning ability of the 3-3-2 DBM network with non-monotonic neurous and the hardware implementation of the 2-3-1 DBM network.Results from numerical simulations for learning the ADD problem show that the learning ability of the non-monotonic network is higher than that of monotonic networks.And, we have designed and fabricated a integrated circuit of the 2-3-1 DBM network with non-monotonic neurons.
"Switched Diffusion Analog Memory with feedback circuit" and designing of Analog Content Addressable Memory using its Analog Memory

HARADA Tomochika, SATO Shigeo, NAKAJIMA Koji

Technical report of IEICE. ICD　98　(66)　53-60　1998/05/22
Publisher: The Institute of Electronics, Information and Communication Engineers

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The latest development of digital signal processing is salient. On the other hand, it is impossible for digital signal processing to perform cognition and comparison of image or voice data, because it is needed a great amount of computation steps. And the digital circuit requires a large chip size in VLSI implementation to obtain the functions with high precision, such as A/D converter and digital comparison circuit. In this study, we develop a new non-volatile analog memory which is referred as "Switched Diffusion Analog Memories SDAMs with Feedback Circuits" for realizing high speed operation and high density integration. And we design a new analog CAM which comprises analog circuits and its analog memories for building a new intelligent system.
Simulation for memory capacity of hysteresis neurons

SHIRAKANE Hisaya, SATO Shigeo, NAKAJIMA Koji

Proceedings of the IEICE General Conference　1998　(1)　33-33　1998/03/06
Publisher: The Institute of Electronics, Information and Communication Engineers
Learning of temporal sequence patterns in neural circuits with quantum interconnection

KATAYAMA Yasuhiro, SATO Shigeo, NAKAJIMA Koji

Proceedings of the IEICE General Conference　1998　76-76　1998/03/06
Publisher: The Institute of Electronics, Information and Communication Engineers
A study on learning ability of DBM with non-monotonic neurons

KINJO Mitsunaga, SATO Shigeo, NAKAJIMA Koji

8　222-223　1997/11/05
Design of chaos generator circuit use a map chaos

TANAKA Hidetoshi, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Nonlinear problems　97　(218)　43-48　1997/07/31
Publisher: The Institute of Electronics, Information and Communication Engineers

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Chaotic noise is helpful to improve performance of an artificial neural network. In this paper, we report two designs of a small chaotic noise generator for large integration of chaotic neural networks. The chaotic noise is generated by map chaos, and can be uniform when we choose proper parameters for various applications. We designed the logistic map and the tent map circuits and found their successful operations.
The Learning Ability of DBM with Quantized Synapses

SHIBATA Souichi, SATO Shigeo, NAKAJIMA Koji

IEICE technical report. Neurocomputing　96　(583)　141-146　1997/03/17
Publisher: The Institute of Electronics, Information and Communication Engineers

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In this paper, we report a study on learning ability of DBM with quantized synapses in view of using analog memories for neurochips. We focused on XOR problem with a 2-2-1 DBM. Numerical simulations was done with a proper annealing schedule which was same as in case of using continuos synapses. Results show that the learning ability depends on how its synaptic weight is quantized and 10〜11bit resolution of a quantized synaptic weight is required for successful learning.
Intelligent IC and Switched Diffusion Analog Memory SDAM

NAKAJIMA Koji, SATO Shigeo

Technical report of IEICE. ICD　96　(266)　23-30　1996/09/26
Publisher: The Institute of Electronics, Information and Communication Engineers

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We have fabricated a new analog memory with a floating gate and refered to the analog memory as Switched Diffusion Analog Memory SDAM. In this paper we evaluate the various aspects of the SDAM function and potentiality. The neural networks and the associative memories comprising SDAMs are designed and fabricated. They contain great possibilities of intelligence in integrated circuits. We discuss the possibility of dynamic pattern processing in a neural network and the analog value processing of an associative memory.
Study of Hardware Integration of An Artificial Neural Network with A New Analog Memory

WON Hyosig, SATO Shigeo, NAKAJIMA Koji, SAWADA Yasuji

1994　40-40　1994/09/26
Publisher: The Institute of Electronics, Information and Communication Engineers

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An active studies on artificial neural network have progressed rapidly to include the design and implementation of VLSI neuro-tips.These chips are to serve as high-performance neuro-processor.This paper desclibes an analog VLSI implementation of a fully connected feedback network with DBM(Deterministic Boltzmann Machine)learning circuit which has variable pulse output neurons and current mode synapses with new analog memory SDAM(Switched Diffusion Analog Memory).
Correct reaction neural network and its implementation

K. Nakajima, Y. Hayakawa, S. Sato, T. Nishimura, J. Murota, Y. Sawada

Proceedings. IJCNN - International Joint Conference on Neural Networks　894　1992/01/01
Implementation of a class of asymmetrical neural networks with application to an a‐d converter

Shigeo Sato, Toshihiko Nishimura, Junichi Murota, Koji Nakajima, Yasuji Sawada

Electronics and Communications in Japan (Part II: Electronics)　75　(7)　92-102　1992

DOI： 10.1002/ecjb.4420750711 　

ISSN： 1520-6432 8756-663X

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Books and Other Publications 2

Low-Energy Plasma CVD for Epitaxy and In-Situ Doping of Group-IV Semiconductors in Nanoelectronics

M. Sakuraba, H. Akima, S. Sato

Nova Science Publishers, Inc　2017/02/14

ISBN: 9781536108934
Complex-Valued Neural Networks: Utilizing High-Dimensional Parameters

Shigeo Sato

Information Science Reference　2009/02

ISBN: 9781605662145

Presentations 66

低電力リザバー計算システムの構築に向けたスパイキングニューラルネットワークLSIの設計

石川将也, 守谷哲, 酒井哲汰, 山本英明, 佐藤茂雄

2025年電子情報通信学会総合大会　2025/03/27
距離依存結合構造を有するアナログSNN回路を用いたリザバー計算による音声信号分類の高性能化

酒井哲汰, 守谷哲, 石川将也, 山本英明, 佐藤茂雄

2025年電子情報通信学会総合大会　2025/03/27
低消費電力アナログCMOS回路を用いたスパイキングニューラルネットワークの実現とリザバー計算応用 Invited

佐藤茂雄, 守谷哲, 石川将也, 山本英明

令和7年電気学会全国大会　2025/03/20
局所運動を統合して平面の空間認識を行う神経網モデルのLSI化

守谷哲, 秋間学尚, 川上進, 矢野雅文, 中島康治, 櫻庭政夫, 佐藤茂雄

2016年電子情報通信学会総合大会　2016/03/15
Depth Profile of B Concentration in Heavily B-Doped Si Epitaxial Film Grown on Si(100) Using ECR Ar Plasma CVD without Substrate Heating International-presentation

K. Motegi, M. Sakuraba, H. Akima, S. Sato

Joint Symp. of 10th Int. Symp. on Medical, Bio- and Nano-Electronics, and 7th Int Workshop on Nanostructures & Nanoelectronics　2016/03/01
Characterization of Si and Si-Ge Alloy Heterostructures Formed on Si(100) by ECR Ar Plasma CVD without Substrate Heating International-presentation

N. Ueno, M. Sakuraba, H. Akima, S. Sato

Joint Symp. of 10th Int. Symp. on Medical, Bio- and Nano-Electronics, and 7th Int Workshop on Nanostructures & Nanoelectronics　2016/03/01
VLSI implementation of a neural network model for detecting planar surface from local image motion International-presentation

H. Akima, S. Moriya, S. Kawakami, M. Yano, K. Nakajima, M. Sakuraba, S. Sato

The 3rd International Symposium on Brainware LSI　2016/02/26
A neural network model for detecting planar orientation and time-to-collision from local image motion International-presentation

S. Moriya, H. Akima, S. Kawakami, M. Yano, K. Nakajima, M. Sakuraba, S. Sato

The 4th RIEC International Symposium on Brain Functions and Brain Computer　2016/02/23
Brain inspired adiabatic quantum computing and learning International-presentation

Y. Osakabe, S. Sato, M. Kinjo, K. Nakajima, H. Akima, M. Sakuraba

The 4th RIEC International Symposium on Brain Functions and Brain Computer　2016/02/23
Evaluation of Electronic Properties of Si/SiGe/Si(100) Heterostructures Formed by ECR Ar Plasma CVD International-presentation

N. Ueno, M. Sakuraba, H. Akima, S. Sato

9th Int. WorkShop on New Group IV Semiconductor Nanoelectronics and JSPS Core-to-Core Program Joint Seminar "Atomically Controlled Processing for Ultralarge Scale Integration"　2016/01/11
Characteristics of B Doping in Si Epitaxial Growth on Si(100) Using ECR Ar Plasma CVD International-presentation

K. Motegi, M. Sakuraba, H. Akima, S. Sato

9th Int. WorkShop on New Group IV Semiconductor Nanoelectronics and JSPS Core-to-Core Program Joint Seminar "Atomically Controlled Processing for Ultralarge Scale Integration"　2016/01/11
Current and voltage dependence of STM induced hydrogen desorption on Si(111) International-presentation

W. Li, S. Sato, H. Akima, M. Sakuraba

9th Int. WorkShop on New Group IV Semiconductor Nanoelectronics and JSPS Core-to-Core Program Joint Seminar "Atomically Controlled Processing for Ultralarge Scale Integration"　2016/01/11
Group-IV Quantum-Heterostructure Formation Based on Low-Energy Plasma CVD towards Electronic Device Application International-presentation

M. Sakuraba, H. Akima, S. Sato

Energy Materials Nanotechnology (EMN) Hong Kong Meeting　2015/12/09
確率的ロジックを用いたIzhikevichニューロン回路の設計

佐藤茂雄, 秋間学尚, 中島康治, 櫻庭政夫

ニューロコンピューティング研究会　2015/11/20
Hydrogen Atom Desorption Induced by Electron Bombardment on Si Surface International-presentation

Wu Li, Shigeo Sato, Hisanao Akima, Masao Sakuraba

228th ECS Meeting　2015/10/11
Superconductivity Coherence in Series Array of Nb/AlOx/Nb Josephson Junctions

刑部好弘, 佐藤茂雄, 小野美威, 秋間学尚, 櫻庭政夫

平成27年度電気関係学会東北支部連合大会　2015/08/27
STMを用いた電子注入によるSi表面終端水素原子の脱離に関する研究

李武, 佐藤茂雄, 秋間学尚, 櫻庭政夫

平成27年度電気関係学会東北支部連合大会　2015/08/27
A Fundamental Study on STM Lithography on Hydrogen-terminated Silicon Surface International-presentation

Shigeo Sato, Wu Li, Hisanao Akima, Masao Sakuraba

The JSPS International Core-to-Core Program Workshop on Atomically Controlled Processing for Ultra-large Scale Integration　2015/07/09
Experimental Analysis of Macroscopic Quantum Tunneling Rate in Series Array of Nb/AlOx/Nb Josephson Junctions International-presentation

Yoshihiro Osakabe, Takeshi Onomi, Hisanao Akima, Masao Sakuraba, Shigeo Sato

15th International Superconductive Electronics Conference (ISEC 2015)　2015/07/06
運動視により局所運動を検出する神経網モデルのLSI化

守谷哲, 秋間学尚, 川上進, 矢野雅文, 中島康治, 櫻庭政夫, 佐藤茂雄

2015年電子情報通信学会総合大会　2015/03/10
VLSI Design of Neural Network Model for Local Motion Detection in Motion Stereo Vision International-presentation

Hisanao Akima, Satoshi Moriya, Susumu Kawakami, Masafumi Yano, Koji Nakajima, Masao Sakuraba, Shigeo Sato

The 2nd Int. Symp. on Brainware LSI　2015/03/02
Study on Surface Reaction in ECR Ar Plasma CVD of SiGe Alloy on Si(100) without Substrate Heating International-presentation

Naofumi. Ueno, Masao Sakuraba, Hisanao Akima, Shigeo Sato

Joint Symp. of 9th Int. Symp on Medical, Bio- and Nano-Electronics, and 6th Int. Workshop on Nanostructures & Nanoelectronics　2015/03/02
VLSI implementation of neural network model in local motion detection in motion stereo vision International-presentation

Hisanao Akima, Satoshi Moriya, Susumu Kawakami, Masafumi Yano, Koji Nakajima, Masao Sakuraba, Shigeo Sato

The 3rd RIEC Int. Symp. on Brain Functions and Brain Computer　2015/02/18
Quantum neural network and its application to optimization problems International-presentation

Shigeo Sato, Mitsunaga Kinjo, Koji Nakajima, Hisanao Akima, Masao Sakuraba

The 3rd RIEC Int. Symp. on Brain Functions and Brain Computer　2015/02/18
Majority Neuron Circuit Having Large Fan-in with Non-Volatile Synaptic Weight International-presentation

International Joint Conference on Neural Networks　2014/07/06
大規模fan-inを有するニューロンを実現する多数決回路

片山康弘, 佐藤茂雄, 櫻庭政夫, 中島康治

コンピューテーショナル・インテリジェンス研究会　2013/12/04
高次結合ネットワークによる最適化問題解探索の為のエネルギー関数設計法

曽田尚宏, 早川吉弘, 佐藤茂雄, 中島康治

電子情報通信学会非線形問題研究会　2012/03/27
学位論文審査会スケジューリング問題とその解探査システム

曽田尚宏, 早川吉弘, 佐藤茂雄, 中島康治

電子情報通信学会2012年総合大会　2012/03/20
SFQ高速並列乗算器の試作と構成論理セルの動作評価

高橋夏樹, 小野美武, 佐藤茂雄, 中島康治

電子情報通信学会2012年総合大会　2012/03/20
高次結合離散IDニューラルネットワークのFPGAによる実装 –TSPの解探査に向けて−

松井考輔, 曽田尚宏, 早川吉弘, 佐藤茂雄, 中島康治

電子情報通信学会2012年総合大会　2012/03/20
ジョセフソン接合列の集団的な力学特性

片山秀瑛, 猪股邦宏, 小野美武, 佐藤茂雄, 中島康治

電子情報通信学会2012年総合大会　2012/03/20
Implementation of a Neurochip using Stochastic Logic International-presentation

S. Sato

3rd Global COE International Symposium- Electronic Devices Innovation (EDIS 2011)　2011/12
Collective Switching Characteristics of Josephson Junctions International-presentation

H. Katayama, R. Nakamoto, K.Inomata, T. Onomi, S. Sato, K. Nakajima

Superconducting SFQ VLSI Workshop SSV 2011　2011/11
Method of Solving Combinatorial Optimization Problems with Stochastic Effects International-presentation

T. Sota, Y. Hayakawa, S. Sato, K. Nakajima

2011 International Conference on Neural Information Processing　2011/11
Dynamic Characteristics of Neuron Models and Active Areas in Potential Functions International-presentation

K. Nakajima, K. Kurose, S. Sato, Y. Hayakawa

IUTAM Symposium on 50 Years of Chaos:Applied and Theoretical　2011/11
ジョセフソン接合列における集団的振舞いとバイアス方法の関係

片山秀瑛, 中本涼介, 猪股邦宏, 小野美武, 佐藤茂雄, 中島康治

第72回応用物理学会学術講演会　2011/08
ストカスティック論理による高次結合ニューラルネットワーク

曽田尚宏, 早川吉弘, 佐藤茂雄, 中島康治

電子情報通信学会非線形問題研究会　2011/03
ジョセフソン接合列における集団的スイッチングとバイアス方法依存性

片山秀瑛, 渡辺峰生, 中本涼介, 猪股邦宏, 小野美武, 佐藤茂雄, 中島康治

第58回応用物理学関係連合講演会　2011/03
ID モデルを用いた N-Queen 問題の静的解探査に対する不応期の導入

宮原惇, 曽田尚宏, 早川吉弘, 佐藤茂雄, 中島康治

電子情報通信学会201１年総合大会　2011/03
相互結合系におけるvan der Pol 振動子の電子回路上の振る舞い

坪井太樹, 黒瀬幸司, 早川吉弘, 佐藤茂雄, 中島康治

電子情報通信学会201１年総合大会　2011/03
相互結合バーストニューロンの同期振動と静止現象

黒瀬幸司, 早川吉弘, 佐藤茂雄, 中島康治

電子情報通信学会201１年総合大会　2011/03
各種並列加算アルゴリズムによる SFQ CLA の性能比較

中本涼介, 小野美武, 佐藤茂雄, 中島康治

電子情報通信学会201１年総合大会　2011/03
アクティブエリアをもつポテンシャルの時空間パターンに基づくバーストダイナミクスの振る舞い

黒瀬幸司, 早川吉弘, 佐藤茂雄, 中島康治

電子情報通信学会非線形問題研究会　2010/11
4次形式のエネルギー関数に基づく組み合わせ最適化問題解探査法

曽田尚宏, 早川吉弘, 佐藤茂雄, 中島康治

電子情報通信学会非線形問題研究会　2010/11
Discrete Higher Order Neural Network for Solving Combinatorial Optimization Problems International-presentation

T. Sota, Y. Hayakawa, S. Sato, K. Nakajima

The 3rd Student Organizing International Mini-Conference on Information Electronics Systems　2010/10
High Throughput Parallel Multiplier of SFQ Circuits based on the Booth Encoder International-presentation

R. Nakamoto, S. Sakuraba, T. Onomi, S. Sato, K. Nakajima

The 3rd Student Organizing International Mini-Conference on Information Electronics Systems　2010/10
Performance of Adiabatic Quantum Computation using Neuron-like Interconnections International-presentation

S. Sato, A. Ono, M. Kinjo, K. Nakajima

The 2010 International Symposium on Nonlinear Theory and its Applications　2010/09
Discrete Higher Order Inverse Function Delayed Network International-presentation

T. Sota, Y. Hayakawa, S. Sato, K. Nakajima

The 2010 International Symposium on Nonlinear Theory and its Applications　2010/09
Analyses of Coupled Hindmarsh-Rose Type Bursting Oscillators International-presentation

K. Kurose, T. Sota, Y. Hayakawa, S. Sato, K. Nakajima

The 2010 International Symposium on Nonlinear Theory and its Applications　2010/09
4-bit SFQ Multiplier Based on Booth Encoder International-presentation

R. Nakamoto, S. Sakuraba, T. Onomi, S. Sato, K. Nakajima

2010 Applied Superconductivity Conference　2010/08
Macroscopic Quantum Tunneling and Resonant Activation in Bi-2212 Intrinsic Josephson Junctions International-presentation

Shigeo Sato, Kunihiro Inomata, Huabing Wang

5th Forum on New Materials (CIMTEC 2010)　2010/06/13
超伝導ニューラルネットワークとその4-Queen問題への応用 International-presentation

前波勇介, 小野美武, 早川吉弘, 佐藤茂雄, 中島康治

電子情報通信学会非線形問題研究会　2010/03
2次ポテンシャル上にアクティブエリアを持つ振動子相互結合系の振る舞い International-presentation

黒瀬幸司, 曽田尚宏, 早川吉弘, 佐藤茂雄, 中島康治

電子情報通信学会非線形問題研究会　2010/03
離散時間高次結合逆関数遅延ネットワーク International-presentation

曽田尚宏, 黒瀬幸司, 早川吉弘, 佐藤茂雄, 中島康治

電子情報通信学会非線形問題研究会　2010/03
高次結合ネットワークによる組み合わせ最適化問題解探査のパラメータ特性

曽田尚宏, 黒瀬幸司, 早川吉弘, 佐藤茂雄, 中島康治

電子情報通信学会2010年総合大会　2010/03
van der Pol相互結合系のポテンシャルとアクティブエリアに基づく動解析

黒瀬幸司, 曽田尚宏, 早川吉弘, 佐藤茂雄, 中島康治

電子情報通信学会2010年総合大会　2010/03
大規模集積回路のためのSFQ Booth Encoder

中本涼介, 桜庭栄, 小野美武, 佐藤茂雄, 中島康治

電子情報通信学会2010年総合大会　2010/03
Low-Tcジョセフソン接合列における集団的スイッチング特性

渡辺峰生, 片山秀瑛, 桜庭栄, 猪股邦宏, 小野美武, 佐藤茂雄, 中島康治

2010年春季第57回応用物理学関係連合講演会　2010/03
Si中のP原子核スピン配列に基づくニューロ様断熱的量子計算について International-presentation

金城光永, 佐藤茂雄

電子情報通信学会電子デバイス研究会／シリコン材料・デバイス研究会　2010/02
High Throughput Parallel Arithmetic Circuits for Fast Fourier Transform International-presentation

S. Sakuraba, A. Martins, T. Onomi, S. Sato, Koji Nakajima

Superconducting SFQ VLSI Workshop SSV 2010　2010/01
Booth encoder for large scale integration SFQ circuits International-presentation

R. Nakamoto, S. Sakuraba, T. Onomi, S. Sato, Koji Nakajima

Superconducting SFQ VLSI Workshop SSV 2010　2010/01
ホップフィールドネットワークと断熱的量子計算 International-presentation

佐藤茂雄, 金城光永, 中島康治

電子情報通信学会非線形問題研究会　2009/11
Collective Dynamics of Intrinsic Josephson Junctions International-presentation

Shigeo Sato, Koji Matsushita, Kunihiro Inomata, Huabing Wang, Takeshi Hatano, Mitsunaga Kinjo, Koji Nakajima

12th International Superconductive Electronics Conference　2009/06
固有ジョセフソン接合列における集団力学について

松下耕司, 佐藤茂雄, 猪股邦宏, 金城光永, 王華兵, 羽多野毅, 中島康治

2009年春季第56回応用物理学関係連合講演会　2009/04
ニューラルネットワークの手法を用いた断熱的量子計算における計算性能のハミルトニアン依存性について

小野亜衣子, 佐藤茂雄, 金城光永, 中島康治

電子情報通信学会2009年総合大会　2009/03
固有ジョセフソン接合の量子特性

佐藤茂雄, 猪股邦宏, 王華兵, 羽多野毅, 金城光永, 中島康治

電子情報通信学会2009年総合大会　2009/03

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Industrial Property Rights 4

銅酸化物高温超伝導体固有ジョセフソン接合を用いた量子ビット

猪股邦宏, 佐藤茂雄, 中島康治, 田中秋広, 高野義彦, 羽多野毅, 王華兵

Property Type: Patent
乱数発生方法及び乱数発生装置

佐藤茂雄

Property Type: Patent
CMOS多数決回路

中島康治, 佐藤茂雄

3297738

Property Type: Patent
薄膜トランジスタを有するアナログメモリ

中島康治, 佐藤茂雄

Property Type: Patent

Research Projects 27

In vitro reconstitution of bioplausible information processing models and their wetware applications

Offer Organization: Japan Society for the Promotion of Science

System: Grants-in-Aid for Scientific Research

Category: Grant-in-Aid for Transformative Research Areas (A)

Institution: Tohoku University

2024/04/01 - 2029/03/31
３Ｃ／４Ｈヘテロエピ基板を用いた高信頼・高移動度ＳｉＣパワーＭＯＳＦＥＴ製作

櫻庭政夫, 佐藤茂雄

Offer Organization: 日本学術振興会

System: 科学研究費助成事業

Category: 基盤研究(C)

Institution: 東北大学

2024/04/01 - 2027/03/31
Artificial reconstitution and reservoir-computing applications of neuronal networks exhibiting high-dimensional dynamics

Offer Organization: Japan Society for the Promotion of Science

System: Grants-in-Aid for Scientific Research

Category: Grant-in-Aid for Scientific Research (B)

Institution: Tohoku University

2023/04/01 - 2027/03/31
Modeling neurodegenerative diseases in artificial neuronal networks

Offer Organization: Japan Society for the Promotion of Science

System: Grants-in-Aid for Scientific Research Fund for the Promotion of Joint International Research (Fostering Joint International Research (B))

Category: Fund for the Promotion of Joint International Research (Fostering Joint International Research (B))

Institution: Tohoku University

2022/10/07 - 2026/03/31
ハイブリッド脳の構成と脳型計算機能の検証

佐藤茂雄, 山本英明

Offer Organization: 日本学術振興会

System: 科学研究費助成事業

Category: 挑戦的研究(萌芽)

Institution: 東北大学

2022/06/30 - 2025/03/31

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本研究では、培養神経細胞を用いて再構成される人工神経回路すなわち培養神経回路と、集積回路上に実現される人工神経回路すなわち半導体神経回路を融合したハイブリッド脳を構成する。研究の目的は、構造可変かつ大規模な生体神経回路を模倣するハイブリッド脳を手段として、生体で実現されている脳型計算機能を検証する。人工的に実現された神経回路において、回路構造と計算機能の関係、学習機能の発現メカニズムなどを実験から明らかにし、半導体神経回路に取り込むべき計算機能の抽出を行う。研究のスケジュールは、最初の１年半でハイブリッド脳の構成を行い、残りの１年半で脳型計算機能の抽出を行う。本年度は、ハイブリッド脳の構成に向けて、引き続き、半導体神経回路の実装と、培養神経回路の信号計測と刺激印加を同時に行うシステムの構築を行った。半導体神経回路の開発では、サブスレッショルド領域で動作するMOSトランジスタを用いたアナログCMOS回路を用いて、96ニューロンから成る結合が可変なスパイキングニューラルネットワークを構築し、入力信号や結合構造に依存して多様な反応を示すことを確認した。また、FPGAを介して半導体神経回路とPCを接続し、PCから各種制御が可能であることを確認した。培養神経回路の開発では、高密度多点電極アレイを用いたフィードバックシステムを構築し、神経細胞の状態計測と刺激印加が同時に実行できることを確認した。さらに、各種学習則の実装に向けて、必要なソフトウェアの開発を行った。
エッジ応用に向けた超低消費電力スパイキングニューラルネットワークハードウェア

佐藤茂雄, 櫻庭政夫, 山本英明

Offer Organization: 日本学術振興会

System: 科学研究費助成事業

Category: 基盤研究(B)

Institution: 東北大学

2022/04/01 - 2025/03/31
Fundamentals and developments of brainmorphic computing hardware

Offer Organization: Japan Society for the Promotion of Science

System: Grants-in-Aid for Scientific Research

Category: Grant-in-Aid for Scientific Research (A)

Institution: Tohoku University

2020/04/01 - 2025/03/31
Time-series information processing based on complex dynamics in artificial neuronal networks and its computational modelling

Yamamoto Hideaki

Offer Organization: Japan Society for the Promotion of Science

System: Grants-in-Aid for Scientific Research

Category: Grant-in-Aid for Scientific Research (B)

Institution: Tohoku University

2018/04/01 - 2022/03/31

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We developed a novel perturbation-analysis setup for artificial neuronal networks to constructively investigate the structure-function relationships in neuronal networks, focusing especially on the modular architecture in the nervous system. Using this setup, we unveiled the functional significance of the modular structure through the analysis of their response to asynchronous input and time-series signals.
Spintronics-Based Hardware Paradigm for Artificial Intelligence

Offer Organization: Japan Society for the Promotion of Science

System: Grants-in-Aid for Scientific Research

Category: Grant-in-Aid for Specially Promoted Research

Institution: Tohoku University

2017/04/25 - 2022/03/31
Experimental Study of Crystal Structure Transformation by Low-Energy Plasma Induced Reconstruction in Si Ultrathin Film

Sakuraba Masao

Offer Organization: Japan Society for the Promotion of Science

System: Grants-in-Aid for Scientific Research

Category: Grant-in-Aid for Challenging Research (Exploratory)

Institution: Tohoku University

2018/06/29 - 2020/03/31

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For formation of Ge/Si ultra-thin film/Ge(100) structure supported by pier structure,a photomask set for formation of regularly-arranged aperture holes and pier structure was designed and fabricated, and the fabrication process of the Si(100) ultra-thin film suspended structure by Ge etching by immersion into hydrogen peroxide solution was studied. As a result, it was found that the diameter of the hole was expanding. This indicated that bottom Ge etching in the lateral direction due to the Si ultrathin film proceeded and prospect of realizing the suspended structure of the Si ultrathin film was obtained. Furthermore, it was confirmed that the dihydride structure peculiar to the Si(100) plane was transformed into the monohydride structure by low energy plasma irradiation.
Learning of neuromorphic quantum computation algorithms

Sato Shigeo

Offer Organization: Japan Society for the Promotion of Science

System: Grants-in-Aid for Scientific Research

Category: Grant-in-Aid for Challenging Research (Exploratory)

Institution: Tohoku University

2017/06/30 - 2020/03/31

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I studied the realization of a quantum computer which can update the interactions between qubits by learning in order to integrate high-speed parallel processing of quantum computer with automatic algorithm extraction function of brain computer. Based on neuromorphic quantum computation algorithm, I proposed a learning rule by which interactions between qubits can be changed adaptively according to correlations of qubits, and studied the learning ability by theoretical analysis and numerical simulation. Furthermore, I proposed device configuration using superconducting charge qubits for hardware implementation, and showed the effectiveness of the proposed method by numerical simulation in which physical property of qubits is taken into consideration.
Development of a nanosized synapse device for brain computers

Sato Shigeo, NAKAJIMA KOJI, ONOMI TAKESHI, AKIMA HISANAO

Offer Organization: Japan Society for the Promotion of Science

System: Grants-in-Aid for Scientific Research

Category: Grant-in-Aid for Scientific Research (C)

Institution: Tohoku University

2013/04/01 - 2016/03/31

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To develop a practical brain computer, we have studied a nanosized synapse device composed of a floating-gate memory and a vertical MOS transistor, which is necessary for huge integration, and its compatibility with neuron and learning circuits. As a result, we have developed poly Si thin film deposition process for floating gate electrodes and fabrication process of vertical MOS transistors, and optimized each process parameters. Furthermore, we estimated the performance of a nanosized synapse device and confirmed its effectiveness and problems in application to large scale neural networks.
High speed logic and memory system based on pair-creation and -annihilation of shingle flux quanta

NAKAJIMA Koji, SATO Shigeo, ONOMI Takeshi

Offer Organization: Japan Society for the Promotion of Science

System: Grants-in-Aid for Scientific Research

Category: Grant-in-Aid for Challenging Exploratory Research

Institution: Tohoku University

2012/04/01 - 2015/03/31

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We studied a possibility of superconducting level logic system in single flux quantum algorithm to investigate rf-SQUID ladder circuits and modified flux quantum parametron circuits. We confirmed the operations of AND, OR, NOT logic by using the presented circuits. Moreover, we demonstrated successfully a 4-bit parallel multiplier using a carry look-ahead adder with niobium integrated circuits to improve the performance of high-speed operation for the single flux-quantum fast Fourier transform and designed a 8-bit parallel multiplier. A neural network using superconducting quantum interference devices was fabricated and successfully demonstrated. Furthermore, we fabricated a neuron circuit using SQUIDs with niobium integrated circuits and successfully demonstrated.
Opitical Control and Detection fo Nuclear Spin Dynamics in Semiconductor Quantum Structures

OHNO Yuzo, MATSUKURA Fumihiro, OHTANI Keita, SATO Shigeo

Offer Organization: Japan Society for the Promotion of Science

System: Grants-in-Aid for Scientific Research

Category: Grant-in-Aid for Scientific Research on Priority Areas

Institution: Tohoku University

2007 - 2010

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We demonstrate manipulation of nuclear spin coherence in a GaAs/AlGaAs quantum well by optically-detected unclear magnetic resonance (NMR). Phase shift of the Larmor precession of photoexcited electron spins is detected to read out the hyperfine-coupled nuclear spin polarization. Multi pulse NMR sequences are generated ton control the population and examine the phase coherence in quadrupolar-split spin-3/2^<75> As nuclei.
ジョセフン逆関数遅延ニューラルネットワーク

中島康治, 佐藤茂雄, 早川吉弘, 小野美武

Offer Organization: 日本学術振興会

System: 科学研究費助成事業

Category: 挑戦的萌芽研究

Institution: 東北大学

2007 - 2009

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21年度も引き続きジョセフソン接合の基本方程式とニューラルネットワークの結合の式を組み合わせて擬似的な逆関数遅延ニューラルネットワークを構成して、その動作の数値解析を進めた。これまで、少数ユニットの構成で極小値からの脱出と最小値への収束を確認しているが、しかしジョセフソン接合の非線形インダクタンスによるヒステリシスを利用した逆関数遅延ニューラルネットワークに関しては動作の安定性の面で難しいことが判明した。このためジョセフソン接合の基本方程式に代えて結合SQUID系とニューラルネットワークの式を組み合わせて擬似的な逆関数遅延ニューラルネットワークを構成し、その数値解析をさらに行い、パラメーターの依存性を詳細に検討した。これにより、多数ユニットの構成で極小値からの脱出と最小値への収束を検証した。負性抵抗によるヒステリシスと非線形インダクタンスによるヒステリシスの違いについては回路動作の安定性の面で違いがあることが認められ、情報処理への影響について原理的観点からの解明を行った。さらに、結合SQUID系のヒステリシスを用いてネットワークを構成し、NP完全問題として4クイーン問題の最適化問題例について計算を実行した。これによりオリジナルな逆関数遅延ニューラルネットワークの結果との比較を進め、その違いを明確にした。超伝導の回路として最適化問題を扱った最初の例である。この結果に基づいて、異なるヒステリシス間の振る舞いの違いをより明確にし、より情報処理に適した効果を抽出する検討を行った。
Artificial Brain Construction based on a Massive Connection of Higher-order and Active Silicon Neurons

NAKAJIMA Koji, SATO Shigeo, HAYAKAWA Yoshihiro, ONOMI Takeshi

Offer Organization: Japan Society for the Promotion of Science

System: Grants-in-Aid for Scientific Research

Category: Grant-in-Aid for Scientific Research (B)

Institution: Tohoku University

2006 - 2009

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We have analyzed bursting characteristics of neuron models based on a concept of potential with active areas. The parameter dependence of coupling oscillators with burst has been clarified. An LSI microchip with 36 neuron units have been measured to analyze coupling systems, and discussed to increase system size. We obtained 100% success rate for TSP and QAP problems solving on neural networks with higher order dynamics.
High-Tc Superconductor Quantum Computer using Intrinsic Josephson Junctions

SATO Shigeo, NAKAJIMA Koji, HAYAKAWA Yoshihiro, ONOMI Takeshi

Offer Organization: Japan Society for the Promotion of Science

System: Grants-in-Aid for Scientific Research

Category: Grant-in-Aid for Scientific Research (B)

Institution: Tohoku University

2006 - 2008
単一核スピン検出用トンネルデバイスに関する研究

佐藤茂雄, 中島康治, 早川吉弘, 小野美武

Offer Organization: 日本学術振興会

System: 科学研究費助成事業

Category: 萌芽研究

Institution: 東北大学

2004 - 2006

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トンネル磁気抵抗効果と電子-核スピン相互作用を用いた単一核スピン検出理論の構築を図った。核スピンとしてはSi中のP原子を想定し、ドナー電子とP原子核との磁気的相互作用のある系を考えた。核スピンと結合するドナー電子をトンネル電流のキャリアとして利用することで単一核スピンの検出が可能と考えられる。スピン検出に必要なデバイスの構成要素として、1)核スピン-ドナー電子系、2)トンネル接合用絶縁膜、3)トンネル電極用強磁性薄膜、4)キャリア電子注入用電極、という4つの要素が考えられ、数値計算等によって材料とデバイス構造を特定した。実験面では、単一P原子の埋め込みに必要な単原子リソグラフィー、特に単水素剥離について集中的に実験を行った。STM針からのトンネル電子の注入によって、Siと水素の結合手を破壊することで水素を剥離することが可能である。以前の実験でSTM針のバイアス電圧をSi-Hの結合エネルギー程度(3.1-3.5[V])とすることで水素を剥離できることが確認されており、本年度はSTM針へ加える電圧パルスの電圧値とパルス幅など単水素剥離の実験条件の最適化を図った。剥離部分が数水素原子分に広がってしまう原因は各種分子振動モードの存在、シュタルク効果などが考えられ、これらの要因を考慮してパルス幅の精密な制御が必要という結論に至り、STM装置の改造に取り組んだ。これは現在も遂行中であり、残念ながら本課題の実デバイス上での確認は今後の課題として残った。しかしながらここで得られた成果は単一核スピン検出用トンネルデバイスの開発に対し重要な寄与を与えるものである。
量子ダイナミクスを導入した新しい脳型計算機に関する研究

佐藤茂雄

Offer Organization: 日本学術振興会

System: 科学研究費助成事業

Category: 若手研究(A)

Institution: 東北大学

2003 - 2005

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ニューロ的手法を導入した断熱的変化アルゴリズムについては、エネルギー散逸効果を取り入れることにより誤動作を排除できることを数値計算から明らかにし、断熱的変化アルゴリズムの弱点を補えることを示した。この成果は論文(PRA)として公表された。またニューラルネットワークと同様、量子計算でも学習を導入することが可能であることを見出した。さらに量子ヘッブ学習を提案し、数値計算によりその動作を確認した。以上から、量子ダイナミクスを導入した脳型計算機アルゴリズムの基幹部分を構築した。まだいくつか検証必要課題が残されているものの、これらの成果は従来のニューラルネットワークをはるかに陵駕できることを原理的に示しており、今後の研究進展が期待される。製作面においては、まず昨年度の成果である高温超伝導体の固有ジョセフソン接合における巨視的量子トンネルについて論文(PRL)で公表した。次いでこの固有ジョセフソン接合の量子状態の制御を試みた。量子状態はマイクロ波を照射することによって制御可能であることから、まず測定系にマイクロ波ラインを導入し、その制御回路を構築した。ダイポールアンテナ等を使ってマイクロ波をサンプルに照射し、そのときの固有ジョセフソン接合の振る舞いを調べた。マイクロ波による共鳴現象、スイッチング電流の低下などを確認した。量子ビットの基本動作であるラビ振動の観測には至らなかったものの、マイクロ波の高精度な時間制御を行えばこれが可能であるとの感触を得ている。Si核スピン量子ビットにおいては、STM探針の先鋭化を図りより空間分解能の高い電子注入を実現した。しかし単水素原子を脱離することには成功せず、核スピン量子ビットの実現には至らなかった。これら2つのデバイスを比較すると、製作の容易さから固有ジョセフソン接合が有利であると言える。
The architectonic Study of information processing system based on fabricating an active artificial brain

NAKAJIMA Koji, SATO Shigeo, HAYAKAWA Yoshihiro, ONOMI Takeshi

Offer Organization: Japan Society for the Promotion of Science

System: Grants-in-Aid for Scientific Research

Category: Grant-in-Aid for Scientific Research (B)

Institution: Tohoku University

2002 - 2005

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The purpose of this subject is construct a macro connecting system with silicon neuron units which have basic active properties including excitable oscillation nature to obtain the Brain like information system by using the constructive method. We proposed the Inverse function Delayed (ID) model. The model is able to increase the memory capacity for association without decrease of basin size for the memorized patterns. Furthermore, the model, which is modified into a discrete time model, achieves 100% success rate for combinatorial optimization problems with high processing speed. We have successfully carried out the TSP problems over 100 cities and etc. We also analyzed the parameter dependence of the performance of the ID model for 100% success rate of one of combinatorial optimization problems. We proposed the memory system for time sequential patterns by using the ID model. Hardware integrated system for the ID model has been investigated as an analog circuit and a digital FPGA chip. We confirmed the operation of the developed system for the ID hardware model. The ID model has been developed to the burst firing model, and its hardware system was also constructed. We are going to construct the active artificial brain system as a next research target.
Application of all-optical nuclear magnetic resonance to quantum computing

OHNO Yuzo, MATSUKURA Fumthiro, OHTANI Keita, SATO Shigeo

Offer Organization: Japan Society for the Promotion of Science

System: Grants-in-Aid for Scientific Research

Category: Grant-in-Aid for Scientific Research on Priority Areas

Institution: Tohoku University

2002 - 2005

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The purpose of the research is to elucidate the dynamics of interaction between electron and nuclear spins in semiconductor quantum structures, and establish fundamental technology for solid state quantum computation in which nuclear spin is utilized as a qubit The achievements of the research are summarized as : 1. We demonstrated that the hyperfine interaction and dynamic nuclear polarization can be controlled by changing the background electron density with gate electric field in a gated n-GaAs/A1GaAs (110) quantum well. We showed that the experimental observation can be explained by metal-insulator transition, on which the hyperfine interaction depends sensitively. 2. We demonstrated detection nuclear spin coherence in semiconductor quantum wells by a time-resolved Kerr rotation (TRKR) technique combined with manipulation by pulse rf NMR. The temporal nuclear polarization after the irradiation of a single-pulsed resonant rf magnetic field was observed by measuring the change of the Kerr rotation at a fixed time delay between pump and probe pulses. We traced the Rabi oscillation as a function of the rf pulse width. We also employed a spin-echo technique to evaluate the intrinsic coherence time, which reveals the dependence on the orientation of the magnetic field with respect to the crystalline axis as expected by the nearest neighbor dipole-dipole interaction.
核スピン検出用単電子トランジスタの試作

佐藤茂雄, 早川吉弘, 小野美武, 中島康治

Offer Organization: 日本学術振興会

System: 科学研究費助成事業

Category: 萌芽研究

Institution: 東北大学

2001 - 2003

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これまで研究を行ってきたSTMリソグラフィー技術の確立に向けて、フラッシングによる基板平坦化に関する研究を行った。これまでの成果で水素レジストを用いた手法の有効性は確認できているものの、検出対象である核スピンを有する不純物ドナー原子の安定な配置には、より平坦な基板表面を得ることが必要不可欠であるとの考察からこの課題に取り組んだ。フラッシングの各種パラメータ(加熱温度、スケジュール)を変化させ、より平坦な表面を得るため条件を求めた。また基板濃度およびフラッシング条件と平坦性の関係を統合的に理解した。また、水素レジストの吸着効率を向上させるための新しい水素クラッキングセルの開発や、SiGe単結晶膜の成膜実験などを行った。これら結果を用いることにより、所望の位置にドナー原子を配置することが可能となり、ひいては単電子トランジスタによるスピンの検出が可能となる。研究目的である核スピンの検出の実現は今後の課題となったが、すでに我々独自に確立したSTMリソグラフィー技術、単電子トランジスタの作製プロセス、エピタキシャル成長技術、極低温技術など、個別の技術を組み合わせることにより当初の研究目的は十分達成可能と考えられる。今後の研究の発展として、我々がすでに開発している汎用性のある量子計算アルゴリズムを核スピン量子ビットに適用することが重要課題となっており、この課題に対して本研究の成果は大きな寄与を与えるものである。
Si-LSIによる量子計算機実現に関する基礎的研究

中島康治, 小野美武, 佐藤茂雄

Offer Organization: 日本学術振興会

System: 科学研究費助成事業

Category: 萌芽的研究

Institution: 東北大学

2000 - 2001

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量子計算の実現のためには、キュビットの実現、ハミルトニアンの制御、読み出し等の要素技術の開発が必要である。Si系の核スピンを利用した量子計算機実現の立場からこれら要素技術に関して考察した。キュビット実現に関しては、STMとCVDを組み合わせた方法とイオン注入を用いた方法の比較検討から前者の優位性を確認し、必要な装置の設計を行った。また、不純物拡散やアイソトープの問題を検討した。キュビットの読み出しに関しては、残念ながらキュビットの実現までに至らなかったため読み出しの実験はできなかったが基本素子である単電子トランジスタの製作技術を確立した。電子ビーム露光とAI膜の斜め蒸着を組み合わせることにより数nmのトンネル接合の形成に成功した。この結果を国際会議にて報告した。また量子計算の実用化のためには、汎用性のある計算アルゴリズムの開発が不可欠であることが指摘されている。この観点から組み合わせ最適化問題を解くハミルトニアンの断熱変化に着目し、これを使ってNクィーン問題の正解が得られることを計算機シミュレーションによって確認した。しかしこのアルゴリズムを物理的に実現するには多くの困難があることから、新たにニューラルネットワークの手法を導入した制約の少ない新しい断熱変化アルゴリズムの開発に取り組んだ。シミュレーションにより性能検証を行い、これら結果を国際会議にて報告した。量子計算の物理的実現は将来の課題として残ったが、本研究の基礎実験や理論的解析結果から、Si量子計算機実現のための多くの有益な知見を得た。
単電子トンネリング現象を利用した集積化神経回路に関する基礎的研究

佐藤茂雄

Offer Organization: 日本学術振興会

System: 科学研究費助成事業

Category: 奨励研究(A)

Institution: 東北大学

1999 - 2000

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単電子デバイスにより構成されるニューラルネットワークの実現を目的として、確率的な単電子トンネリング現象を数値シミュレーションによって解析した。前年度に得られた成果を基にSETトランジスタを基本としたニューロン、シナプス両回路を実現し、ネットワークの動作を確認した。4クイーン問題などの最適化問題を対象として、所望の動作が実現されることを確認した。動作温度やキャパシタンスの大きさなどに依存して、協同トンネリング現象の発生確率が大きく変わりその結果最適解への収束確率も大きく変化する様子を調べた。動作温度を室温とした場合に必要とされるパラメータ(キャパシタンスや電源電圧の大きさ、回路構成など)を最適化し、これら結果を国際会議で発表した。以上から、単電子デバイスを用いたニューラルネットワーク設計手法を確立した。デバイス製作においては、単電子デバイスの製作のために必要不可欠の基本技術である電子ビーム露光装置を利用したリソグラフィー技術、薄いトンネル酸化膜形成作製技術、電子ビーム斜め蒸着法を用いた微小接合形成技術等の確立を図った。これら技術を用いてAl-AlOx-Alのトンネル接合を形成し、その基本特性を調べた。以上により、単電子デバイス製作上の基礎技術を確立した。
Constitution of Neuro-based Dynamic Memory

NAKAJIMA Koji, ONOMI Takeshi, SATO Shigeo

Offer Organization: Japan Society for the Promotion of Science

System: Grants-in-Aid for Scientific Research

Category: Grant-in-Aid for Scientific Research (B)

Institution: Tohoku University

1997 - 1999

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The purposes of this research are analyses for behaviors of neuro-based dynamic memories, research for applications of the memories, a constitution of the memory, analyses for learning ability of the memories, a hardware integration of the memories aimed at real time processings. We analyzed the number of limit cycles generated in a single neural network by using a proposed learning algorithm. We also analyzed the characteristics of the limit cycles and transition states to the limit cycles, and characteristics of a non-monotonic neuron network which has a higher performance of learning ability. Interactions among the limit cycles, initial states, and chaotic noise were investigated on fabricated neuro-chips with integrated chaotic signal generators. In order to investigate dynamic behaviors of quantized interconnection networks on neuro-chips, we have designed and fabricated a hardware neural network according to the design rule of a CMOS technology. The 225 (and 42) full connections between 15 (and 7) neurons and the self-couplings can be performed in the fabricated neuro-chip. The number of limit cycles which can be produced on the single network increases sharply with increasing the number of neurons in case of nearest neighbor connections. For an example, 1.14x10ィイD17ィエD1 limit cycles in the case of 40 neurons are estimated at least. The limit cycles have basins of attraction, and hence, we may utilize the network as associative memeory to retrieve dynamical cyclic patterns. We also presented the quantized interconnection network to solve the N-parity problem and a random Boolean function with arbitrary N inputs. Finally, we discussed the learning possibility for the quantized interconnection networks. These results show the high performance of the neuro-based dynamic memories and the high possibility of applications of the memory as intelligent information processors.
Study on an associative memory system with a new analog memory device

NAKAJIMA Koji, MIZUGAKI Yoshinao, SATO Shigeo

Offer Organization: Japan Society for the Promotion of Science

System: Grants-in-Aid for Scientific Research

Category: Grant-in-Aid for Scientific Research (B)

Institution: Tohoku University

1997 - 1998

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For the purpose of realizing a new intelligent system and its simplified VLSI implementation, we propose a new nonvolatile analog memory called "switched diffusion analog memory with feedback circuit (FBSDAM)". FBSDAM has linear writing and erasing characteristics. Therefore, FBSDAM is useful for memorizing an analog value exactly. We also propose a new analog content-addressable memory (CAM) which has neural-like learning and discriminating functions which discriminate whether an incoming pattern is an unknown pattern or a stored pattern. We design and fabricate the CAM using FBSDAM by means of the 4\(\mu\)m double-poly single-metal CMOS process and nonvolatile analog memory technology which are developed by us. The chip size is 3.1mm x 3.1mm. We estimate that the CAM is composed of 50 times fewer transistors and requires 70 times fewer calculation steps than a typical digital computer implemented using similar technology.
Study on LSI Implementation of Neural Networks Competitive

System: Grant-in-Aid for Scientific Research

1996/04 -

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JNNS-DEX-SMI 公開講座「神経回路網の理論展開と最先端応用」

2007/03/16 - 2007/03/18

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(招待講演) 確率的ロジックを用いたパルス神経回路の設計と製作
応用物理学会超伝導分科会主催第36 回研究会『基礎から学ぶ超伝導量子計算機－量子計算の原理から最先端研究まで－』

2007/11/15 -

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(招待講演) Bi 系高温超伝導固有ジョセフソン接合における巨視的量子トンネリングの観測

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断熱的変化ハミルトニアンを使った量子計算アルゴリズムに関する研究

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量子計算は莫大な組合せの中から唯一の最適解を瞬時に得ることができるとして、暗号技術や組合せ最適化問題などの分野では革命的な技術発展が期待されている。しかし、これまでに提案されているアルゴリズムはまだ数えるほどしか存在せず、ハードウェアの構築と同時にアルゴリズムの整備も急務の研究課題となっている。そこで、ハミルトニアンの断熱的変化を使った量子計算アルゴリズムの構築を行うことを目的として研究を行った。人工神経回路に使われている手法を量子ビットに利用し、最適化問題を解く量子計算機モデルを提案した。量子計算機の動作を規定するハミルトニアンの構成方法を示し、シミュレーション結果からその有効性を確認した。
量子ビットを用いた知能デバイス

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本質的並列処理の可能性を持つ量子計算を知能処理へ応用するためソフト・ハード両面からの研究を行った. 知能処理の実現に向けて人工神経回路の研究がなされているが, 連想処理や学習などの多くは莫大な組み合わせの中から最適解を見いだす問題に帰着可能である. そこで通常利用されるのが最急降下アルゴリズムであるが, よく知られているようにローカルミニマの問題からエラーを発生する場合が少なくない. 量子計算アルゴリズムはこうした問題を本質的に解決する可能性を持っている. 本研究では, 知能処理に適した新しい量子計算アルゴリズムの提案とそれを実現する量子ビットの実現に関し研究を行った. 研究成果として, 核スピン量子ビットのための STM 単原子リソグラフィー基礎技術の開発, 超伝導量子ビットのための Bi-2212 ウィスカー結晶を使った十字型ジョセフソン接合の製作, ハミルトニアンの断熱的変化を使ったニューロ様量子計算アルゴリズムの開発などが得られた.
新しいアナログシナプスを用いた生体を指向した人工神経回路大規模集積化に関する研究鵜

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フローティングゲートメモリの有するメモリ離散化特性の神経回路の情報処理能力に及ぼす影響を考慮し、ハードウェア化の際のシナプスメモリ設計の指針を示した。また、カオス神経回路への応用を考慮してカオスノイズ発生器の試作を行い、マップカオスの有効性を示した。