Details of the Researcher

PHOTO

Tomoyuki Suwa
Section
New Industry Creation Hatchery Center
Job title
Specially Appointed Professor(Research)
Degree

  • Ph. D (Tohoku University)

Research History 3

  • 2018/02 - Present
    Tohoku University　New Industry Creation Hatchery Center

  • 2007/04 - 2018/01
    Tohoku University　New Industry Creation Hatchery Center

  • 2006/04 - 2007/03
    Tohoku University　New Industry Creation Hatchery Center

Education 4

  • 東北大学大学院　工学研究科博士課程後期3年の課程（電子工学専攻）

    2003/04 - 2006/03

  • 東北大学大学院　工学研究科博士課程前期2年の課程（電子工学専攻）

    2001/04 - 2003/03

  • Tohoku University

    1997/04 - 2001/03

  • 1996年 3月 栃木県立栃木高等学校

    - 1996/03

Committee Memberships 3

  • 電子情報通信学会 シリコン材料・デバイス研究会　幹事

    2022/06 - Present

  • 応用物理学会 薄膜・表面物理分科会、シリコンテクノロジー分科会 電子デバイス界面テクノロジー研究会　実行・プログラム委員

    2016/01 - Present

  • 電子情報通信学会 シリコン材料・デバイス研究会　幹事補佐

    2020/06 - 2022/05

Research Interests 1

  • 電子デバイス、半導体、表面界面物性、計測技術

Research Areas 3

  • Manufacturing technology (mechanical, electrical/electronic, chemical engineering) / Electric/electronic material engineering /

  • Nanotechnology/Materials / Thin-film surfaces and interfaces /

  • Manufacturing technology (mechanical, electrical/electronic, chemical engineering) / Electronic devices and equipment /

Awards 2

  1. 36th JSAP Outstanding Paper Award

    2014/09　Chemical Structure of Interfacial Transition Layer Formed on Si(100) and Its Dependence on Oxidation Temperature, Annealing in Forming Gas, and Difference in Oxidizing Species

  2. 第33回熊谷記念真空科学論文賞

    2008/10　日本真空協会　ラジカル窒化シリコン酸窒化膜における窒素プロファイルのＸ線光電子分光分析による評価

Papers 84

  1. Threshold voltage uniformity improvement by introducing charge injection tuning for low-temperature poly-Si thin film transistors with metal/oxide/nitride/oxide/silicon structure

    Tetsuya Goto, Tomoyuki Suwa, Keita Katayama, Shu Nishida, Hiroshi Ikenoue, Shigetoshi Sugawa

    Japanese Journal of Applied Physics　63　(2)　02SP51-02SP51　2024/01/17

    Publisher: IOP Publishing

    DOI： 10.35848/1347-4065/ad184d 　

    ISSN： 0021-4922

    eISSN： 1347-4065

    More details Close

    Abstract Low-temperature poly-Si thin film transistors (TFTs) with a metal/oxide/nitride/oxide/silicon structure were fabricated to investigate the feasibility of suppressing threshold voltage variations between TFTs. By applying relatively high positive and negative gate bias voltages, threshold voltage could be tuned positively and negatively, respectively, by injecting charges into the charge trap layer. Stability of threshold voltage against positive gate bias at a level close to the actual circuit operation was not degraded compared with the case of an as-fabricated TFT. A uniform threshold voltage distribution could be achieved in a preliminary test using 16 TFTs by converging threshold voltages with a target value by tuning the threshold voltage for each TFT.

  2. Visualization and Analysis of Temporal and Steady-State Gas Concentration in Process Chamber Using 70-dB SNR 1,000 fps Absorption Imaging System

    Y. Sakai, Y. Shiba, T. Inada, T. Goto, T. Suwa, T. Oikawa, A. Hamaya, A. Sutoh, T. Morimoto, Y. Shirai, S. Sugawa, R. Kuroda

    IEEE Transactions on Semiconductor Manufacturing　1-1　2023

    Publisher: Institute of Electrical and Electronics Engineers (IEEE)

    DOI： 10.1109/tsm.2023.3267024 　

    ISSN： 0894-6507

    eISSN： 1558-2345

  3. Adsorption and surface reaction of isopropyl alcohol on SiO2 surfaces Peer-reviewed

    Takezo Mawaki, Akinobu Teramoto, Katsutoshi Ishii, Yoshinobu Shiba, Rihito Kuroda, Tomoyuki Suwa, Shuji Azumo, Akira Shimizu, Kota Umezawa, Yasuyuki Shirai, Shigetoshi Sugawa

    JOURNAL OF VACUUM SCIENCE & TECHNOLOGY A　40　(5)　2022/09

    DOI： 10.1116/6.0002002 　

    ISSN： 0734-2101

    eISSN： 1520-8559

  4. A 70-dB SNR High-Speed Global Shutter CMOS Image Sensor for in Situ Fluid Concentration Distribution Measurements Peer-reviewed

    Tetsu Oikawa, Rihito Kuroda, Keigo Takahashi, Yoshinobu Shiba, Yasuyuki Fujihara, Hiroya Shike, Maasa Murata, Chia-Chi Kuo, Yhang Ricardo Sipauba Carvalho da Silva, Tetsuya Goto, Tomoyuki Suwa, Tatsuo Morimoto, Yasuyuki Shirai, Takafumi Inada, Yushi Sakai, Masaaki Nagase, Nobukazu Ikeda, Shigetoshi Sugawa

    IEEE TRANSACTIONS ON ELECTRON DEVICES　69　(6)　2965-2972　2022/06

    DOI： 10.1109/TED.2022.3165520 　

    ISSN： 0018-9383

    eISSN： 1557-9646

  5. A high-precision current measurement platform applied for statistical measurement of discharge current transient spectroscopy of traps in SiN dielectrics Peer-reviewed

    Koga Saito, Hayato Suzuki, Hyeonwoo Park, Rihito Kuroda, Akinobu Teramoto, Tomoyuki Suwa, Shigetoshi Sugawa

    Japanese Journal of Applied Physics　60　(8)　086501-086501　2021/08/01

    Publisher: {IOP} Publishing

    DOI： 10.35848/1347-4065/ac1215 　

  6. Modification of copper and copper oxide surface states due to isopropyl alcohol treatment toward area-selective processes Peer-reviewed

    Takezo Mawaki, Akinobu Teramoto, Katsutoshi Ishii, Yoshinobu Shiba, Rihito Kuroda, Tomoyuki Suwa, Shuji Azumo, Akira Shimizu, Kota Umezawa, Yasuyuki Shirai, Shigetoshi Sugawa

    Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films　39　(1)　2021/01/01

    DOI： 10.1116/6.0000618 　

    ISSN： 0734-2101

    eISSN： 1520-8559

  7. Influence of silicon wafer surface roughness on semiconductor device characteristics Peer-reviewed

    Keiichiro Mori, Shuichi Samata, Noritomo Mitsugi, Akinobu Teramoto, Rihito Kuroda, Tomoyuki Suwa, Keiichi Hashimoto, Shigetoshi Sugawa

    JAPANESE JOURNAL OF APPLIED PHYSICS　59　2020/07

    DOI： 10.35848/1347-4065/ab918c 　

    ISSN： 0021-4922

    eISSN： 1347-4065

  8. Resistance Measurement Platform for Statistical Analysis of Emerging Memory Materials Peer-reviewed

    Takeru Maeda, Yuya Omura, Rihito Kuroda, Akinobu Teramoto, Tomoyuki Suwa, Shigetoshi Sugawa

    IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING　33　(2)　232-239　2020/05

    DOI： 10.1109/TSM.2020.2983100 　

    ISSN： 0894-6507

    eISSN： 1558-2345

  9. Study on influence of O<inf>2</inf> concentration in wafer cleaning ambient for smoothness of silicon (110) surface appearing at sidewall of three-dimensional transistors Peer-reviewed

    Tomoyuki Suwa, Akinobu Teramoto, Yasuyuki Shirai, Takenobu Matsuo, Nobutaka Mizutani, Shigetoshi Sugawa

    ECS Transactions　97　(3)　23-29　2020/04

    DOI： 10.1149/09703.0023ecst 　

    ISSN： 1938-6737

    eISSN： 1938-5862

  10. Effect of Drain-to-Source Voltage on Random Telegraph Noise Based on Statistical Analysis of MOSFETs with Various Gate Shapes Peer-reviewed

    R. Akimoto, R. Kuroda, A. Teramoto, T. Mawaki, S. Ichino, T. Suwa, S. Sugawa

    IEEE International Reliability Physics Symposium Proceedings　2020-April　2020/04

    DOI： 10.1109/IRPS45951.2020.9128341 　

    ISSN： 1541-7026

  11. A high-precision 1 Omega-10 M Omega range resistance measurement platform for statistical evaluation of emerging memory materials Peer-reviewed

    Takeru Maeda, Yuya Omura, Rihito Kuroda, Akinobu Teramoto, Tomoyuki Suwa, Shigetoshi Sugawa

    JAPANESE JOURNAL OF APPLIED PHYSICS　59　(SG)　2020/04

    DOI： 10.35848/1347-4065/ab6d86 　

    ISSN： 0021-4922

    eISSN： 1347-4065

  12. High reliability CoFeB/MgO/CoFeB magnetic tunnel junction fabrication using low-damage ion beam etching Peer-reviewed

    Hyeonwoo Park, Akinobu Teramoto, Jun-ichi Tsuchimoto, Keiichi Hashimoto, Tomoyuki Suwa, Marie Hayashi, Rihito Kuroda, Koji Tsunekawa, Shigetoshi Sugawa

    JAPANESE JOURNAL OF APPLIED PHYSICS　59　2020/04

    DOI： 10.35848/1347-4065/ab6cb5 　

    ISSN： 0021-4922

    eISSN： 1347-4065

  13. Amorphous titanium-oxide supercapacitors with high capacitance Peer-reviewed

    Mikio Fukuhara, Tomoyuki Kuroda, Fumihiko Hasegawa, Yasuyuki Shirai, Tomoyuki Suwa, Toshiyuki Hashida, Masahiko Nishijima

    EPL (Europhysics Letters)　128　(5)　58001-58001　2020/02/04

    Publisher: IOP Publishing

    DOI： 10.1209/0295-5075/128/58001 　

    eISSN： 1286-4854

  14. Low-Temperature Deposition of Silicon Nitride Films Using Ultraviolet-Irradiated Ammonia Peer-reviewed

    Yoshinobu Shiba, Akinobu Teramoto, Tomoyuki Suwa, Katsutoshi Ishii, Akira Shimizu, Kota Umezawa, Rihito Kuroda, Shigetoshi Sugawa

    ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY　8　(11)　P715-P718　2019/11

    DOI： 10.1149/2.0131911jss 　

    ISSN： 2162-8769

  15. Effects of temperatures and carbon dioxide nanobubbles on superior electric storage for anodically oxidized films of AlY10 amorphous alloy Peer-reviewed

    Mikio Fukuhara, Tomoyuki Kuroda, Fumihiko Hasegawa, Masayoshi Takahashi, Tomoyuki Suwa, Toshiyuki Hashida, Kazuhisa Sato, Masahiko Nishijima, K. Konno

    AIP ADVANCES　9　(9)　2019/09

    DOI： 10.1063/1.5102082 　

    ISSN： 2158-3226

  16. SiNx deposition at low temperature using uv-irradiated NH3 Peer-reviewed

    Y. Shiba, A. Teramoto, T. Suwa, K. Ishii, A. Shimizu, K. Umezawa, R. Kuroda, S. Sugawa

    ECS Transactions　89　(4)　31-36　2019

    DOI： 10.1149/08904.0031ecst 　

    ISSN： 1938-6737

    eISSN： 1938-5862

  17. Resistance Measurement Platform for Statistical Analysis of Next Generation Memory Materials Peer-reviewed

    Takeru Maeda, Yuya Omura, Akinobu Teramoto, Rihito Kuroda, Tomoyuki Suwa, Shigetoshi Sugawa

    2019 IEEE 32ND INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES (ICMTS)　2019-March　70-75　2019

    DOI： 10.1109/ICMTS.2019.8730955 　

    ISSN： 1071-9032

  18. An Electrical Impedance Biosensor Array for Tracking Moving Cells Peer-reviewed

    Norichika Ogata, Akihisa Shina, Takayuki Komiya, Yoji Iizuka, Ken Matsuse, Fuminobu Imaizumi, Tomoyuki Suwa, Akinobu Teramoto

    Proceedings of IEEE Sensors　2018-October　2018/12/26

    DOI： 10.1109/ICSENS.2018.8589577 　

    ISSN： 1930-0395

    eISSN： 2168-9229

  19. Statistical Analysis of Threshold Voltage Variation Using MOSFETs With Asymmetric Source and Drain Peer-reviewed

    Shinya Ichino, Akinobu Teramoto, Rihito Kuroda, Takezo Mawaki, Tomoyuki Suwa, Shigetoshi Sugawa

    IEEE ELECTRON DEVICE LETTERS　39　(12)　1836-1839　2018/12

    DOI： 10.1109/LED.2018.2874012 　

    ISSN： 0741-3106

    eISSN： 1558-0563

  20. Effect of drain current on appearance probability and amplitude of random telegraph noise in low-noise CMOS image sensors Peer-reviewed

    Shinya Ichino, Takezo Mawaki, Akinobu Teramoto, Rihito Kuroda, Hyeonwoo Park, Shunichi Wakashima, Tetsuya Goto, Tomoyuki Suwa, Shigetoshi Sugawa

    JAPANESE JOURNAL OF APPLIED PHYSICS　57　(4)　2018/04

    DOI： 10.7567/JJAP.57.04FF08 　

    ISSN： 0021-4922

    eISSN： 1347-4065

  21. Experimental investigation of localized stress-induced leakage current distribution in gate dielectrics using array test circuit Peer-reviewed

    Hyeonwoo Park, Akinobu Teramoto, Rihito Kuroda, Tomoyuki Suwa, Shigetoshi Sugawa

    JAPANESE JOURNAL OF APPLIED PHYSICS　57　(4)　2018/04

    DOI： 10.7567/JJAP.57.04FE11 　

    ISSN： 0021-4922

    eISSN： 1347-4065

  22. Reliability of MgO in Magnetic Tunnel Junctions Formed by MgO Sputtering and Mg Oxidation Peer-reviewed

    Akinobu Teramoto, Keiichi Hashimoto, Tomoyuki Suwa, Jun-ichi Tsuchimoto, Marie Hayashi, Hyeonwoo Park, Shigetoshi Sugawa

    2018 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS)　2018

    ISSN： 1541-7026

  23. Statistical Analyses of Random Telegraph Noise in Pixel Source Follower with Various Gate Shapes in CMOS Image Sensor Peer-reviewed

    Shinya Ichino, Takezo Mawaki, Akinobu Teramoto, Rihito Kuroda, Shunichi Wakashima, Tomoyuki Suwa, Shigetoshi Sugawa

    ITE TRANSACTIONS ON MEDIA TECHNOLOGY AND APPLICATIONS　6　(3)　163-170　2018

    DOI： 10.3169/mta.6.163 　

    ISSN： 2186-7364

  24. Formation technology of flat surface with epitaxial growth on ion-implanted (100)-oriented Si surface of thin silicon-on-insulator Peer-reviewed

    Kiichi Furukawa, Akinobu Teramoto, Rihito Kuroda, Tomoyuki Suwa, Keiichi Hashimoto, Shigetoshi Sugawa, Daisuke Suzuki, Yoichiro Chiba, Katsutoshi Ishii, Akira Shimizu, Kazuhide Hasebe

    JAPANESE JOURNAL OF APPLIED PHYSICS　56　(10)　2017/10

    DOI： 10.7567/JJAP.56.105503 　

    ISSN： 0021-4922

    eISSN： 1347-4065

  25. Hole-Trapping Process at Al2O3/GaN Interface Formed by Atomic Layer Deposition Peer-reviewed

    Akinobu Teramoto, Masaya Saito, Tomoyuki Suwa, Tetsuo Narita, Rihito Kuroda, Shigetoshi Sugawa

    IEEE ELECTRON DEVICE LETTERS　38　(9)　1309-1312　2017/09

    DOI： 10.1109/LED.2017.2734914 　

    ISSN： 0741-3106

    eISSN： 1558-0563

  26. Atomically flat interface for noise reduction in SOI-MOSFETs Peer-reviewed

    Philippe Gaubert, Alexandre Kircher, Hyeonwoo Park, Rihito Kuroda, Shigetoshi Sugawa, Tetsuya Goto, Tomoyuki Suwa, Akinobu Teramoto

    2017 INTERNATIONAL CONFERENCE ON NOISE AND FLUCTUATIONS (ICNF)　2017

    ISSN： 2575-5587

    eISSN： 2575-5595

  27. Impact of SiO2/Si Interface Micro-roughness on SILC Distribution and Dielectric Breakdown: A Comparative Study with Atomically Flattened Devices Peer-reviewed

    Hyeonwoo Park, Tetsuya Goto, Rihito Kuroda, Akinobu Teramoto, Tomoyuki Suwa, Daiki Kimoto, Shigetoshi Sugawa

    2017 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS)　2017

    ISSN： 1541-7026

  28. Proposal of tunneling- and diffusion-current hybrid MOSFET: A device simulation study Peer-reviewed

    Kiichi Furukawa, Akinobu Teramoto, Rihito Kuroda, Tomoyuki Suwa, Keiichi Hashimoto, Takashi Kojiri, Shigetoshi Sugawa

    JAPANESE JOURNAL OF APPLIED PHYSICS　55　(4)　2016/04

    DOI： 10.7567/JJAP.55.04ED12 　

    ISSN： 0021-4922

    eISSN： 1347-4065

  29. Detection of short range order in SiO2 thin-films by grazing-incidence wide and small-angle X-ray scattering Peer-reviewed

    Kohki Nagata, Atsushi Ogura, Ichiro Hirosawa, Tomoyuki Suwa, Akinobu Teramoto, Tadahiro Ohmi

    JOURNAL OF APPLIED PHYSICS　119　(15)　2016/04

    DOI： 10.1063/1.4947053 　

    ISSN： 0021-8979

    eISSN： 1089-7550

  30. Low Leakage Current Al2O3 Metal-Insulator-Metal Capacitors Formed by Atomic Layer Deposition at Optimized Process Temperature and O-2 Post Deposition Annealing Peer-reviewed

    Y. Koda, H. Sugita, T. Suwa, R. Kuroda, T. Goto, A. Teramoto, S. Sugawa

    ECS Transactions　72　(4)　91-100　2016

    DOI： 10.1149/07204.0091ecst 　

    ISSN： 1938-5862

  31. Introduction of a High Selectivity Etching Process with Advanced SiNx Etch Gas in the Fabrication of FinFET Structures Peer-reviewed

    T. Kojiri, T. Suwa, K. Hashimoto, A. Teramoto, R. Kuroda, S. Sugawa

    ECS Transactions　72　(4)　23-30　2016

    DOI： 10.1149/07204.0023ecst 　

    ISSN： 1938-5862

  32. Oxidizing species dependence of the interface reaction during atomic-layer-deposition process and post-deposition-anneal Peer-reviewed

    T. Suwa, A. Teramoto, Y. Koda, M. Saito, H. Sugita, M. Hayashi, J. Tsuchimoto, H. Ishii, Y. Shiba, Y. Shirai, S. Sugawa

    ECS Transactions　75　(5)　207-214　2016

    DOI： 10.1149/07505.0207ecst 　

    ISSN： 1938-6737

    eISSN： 1938-5862

  33. Evaluating Work-Function and Composition of ErSix on Various Surface Orientation of Silicon Peer-reviewed

    Akinobu Teramoto, Hiroaki Tanaka, Tomoyuki Suwa, Tetsuya Goto, Rihito Kuroda, Tsukasa Motoya, Kazumasa Kawase, Shigetoshi Sugawa

    ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY　5　(10)　P608-P613　2016

    DOI： 10.1149/2.0221610jss 　

    ISSN： 2162-8769

    eISSN： 2162-8777

  34. Introduction of Atomically Flattening of Si Surface to Large-Scale Integration Process Employing Shallow Trench Isolation Peer-reviewed

    Tetsuya Goto, Rihito Kuroda, Naoya Akagawa, Tomoyuki Suwa, Akinobu Teramoto, Xiang Li, Toshiki Obara, Daiki Kimoto, Shigetoshi Sugawa, Yutaka Kamata, Yuki Kumagai, Katsuhiko Shibusawa

    ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY　5　(2)　P67-P72　2016

    DOI： 10.1149/2.0221602jss 　

    ISSN： 2162-8769

    eISSN： 2162-8777

  35. Atomically flattening of Si surface of silicon on insulator and isolation-patterned wafers Peer-reviewed

    Tetsuya Goto, Rihito Kuroda, Naoya Akagawa, Tomoyuki Suwa, Akinobu Teramoto, Xiang Li, Toshiki Obara, Daiki Kimoto, Shigetoshi Sugawa, Tadahiro Ohmi, Yutaka Kamata, Yuki Kumagai, Katsuhiko Shibusawa

    JAPANESE JOURNAL OF APPLIED PHYSICS　54　(4)　2015/04

    DOI： 10.7567/JJAP.54.04DA04 　

    ISSN： 0021-4922

    eISSN： 1347-4065

  36. Ultra-Low Temperature Flattening Technique of Silicon Surface Using Xe/H2 Plasma Peer-reviewed

    Tomoyuki Suwa, Akinobu Teramoto, Tetsuya Goto, Masaki Hirayama, Shigetoshi Sugawa, Tadahiro Ohmi

    ECS Transactions　66　(5)　277-283　2015

    DOI： 10.1149/06605.0277ecst 　

  37. Effect of Hydrogen on Silicon Nitrides Formation by Microwave Excited Plasma Enhanced Chemical Vapor Deposition Peer-reviewed

    A. Teramoto, Y. Nakao, T. Suwa, K. Hashimoto, T. Motoya, M. Hirayama, S. Sugawa, T. Ohmi

    ECS Transactions　66　(4)　151-159　2015

    DOI： 10.1149/06604.0151ecst 　

  38. Low temperature atomically flattening of Si surface of shallow trench isolation pattern Peer-reviewed

    T. Goto, R. Kuroda, T. Suwa, A. Teramoto, N. Akagawa, D. Kimoto, S. Sugawa, T. Ohmi, Y. Kamata, Y. Kumagai, K. Shibusawa

    ECS Transactions　66　(5)　285-292　2015

    Publisher: Electrochemical Society Inc.

    DOI： 10.1149/06605.0285ecst 　

    ISSN： 1938-5862

    eISSN： 1938-6737

  39. Effect of process temperature of Al<inf>2</inf>O<inf>3</inf> atomic layer deposition using accurate process gasses supply system Peer-reviewed

    H. Sugita, Y. Koda, T. Suwa, R. Kuroda, T. Goto, H. Ishii, S. Yamashita, A. Teramoto, S. Sugawa, T. Ohmi

    ECS Transactions　66　(4)　305-314　2015

    Publisher: Electrochemical Society Inc.

    DOI： 10.1149/06604.0305ecst 　

    ISSN： 1938-6737

    eISSN： 1938-5862

  40. Surface metal cleaning of GaN surface based on redox potential of cleaning solution Peer-reviewed

    K. Nagao, K. Nakamura, A. Teramoto, Y. Shirai, F. Imaizumi, T. Suwa, S. Sugawa, T. Ohmi

    ECS Transactions　66　(7)　11-21　2015

    DOI： 10.1149/06607.0011ecst 　

    ISSN： 1938-6737

    eISSN： 1938-5862

  41. Effect of oxygen impurity on nitrogen radicals in post-discharge flows Peer-reviewed

    Y. Shiba, A. Teramoto, T. Suwa, K. Watanabe, S. Nishimura, Y. Shirai, S. Sugawa

    ECS Transactions　69　(39)　1-9　2015

    DOI： 10.1149/06939.0001ecst 　

    ISSN： 1938-6737

    eISSN： 1938-5862

  42. Structural Analyses of Thin SiO2 Films Formed by Thermal Oxidation of Atomically Flat Si Surface by Using Synchrotron Radiation X-Ray Characterization Peer-reviewed

    Kohki Nagata, Atsushi Ogura, Ichiro Hirosawa, Tomoyuki Suwa, Akinobu Teramoto, Takeo Hattori, Tadahiro Ohmi

    ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY　4　(8)　N96-N98　2015

    DOI： 10.1149/2.0131508jss 　

    ISSN： 2162-8769

  43. Mass densification and defect restoration in chemical vapor deposition silicon dioxide film using Ar plasma excited by microwave Peer-reviewed

    Kazumasa Kawase, Tsukasa Motoya, Yasushi Uehara, Akinobu Teramoto, Tomoyuki Suwa, Tadahiro Ohmi

    JOURNAL OF VACUUM SCIENCE & TECHNOLOGY A　32　(5)　2014/09

    DOI： 10.1116/1.4886770 　

    ISSN： 0734-2101

    eISSN： 1520-8559

  44. Influence of Si Surface Roughness on Electrical Characteristics of MOSFET with HfON Gate Insulator Formed by ECR Plasma Sputtering Peer-reviewed

    Dae-Hee Han, Shun-ichiro Ohmi, Tomoyuki Suwa, Philippe Gaubert, Tadahiro Ohmi

    IEICE TRANSACTIONS ON ELECTRONICS　E97C　(5)　413-418　2014/05

    DOI： 10.1587/transele.E97.C.413 　

    ISSN： 1745-1353

  45. Effect of Composition Ratio on Erbium Silicide Work Function on Different Morphology of Si(100) Surface Changed by Alkaline Etching Peer-reviewed

    Hiroaki Tanaka, Tomoyuki Suwa, Akinobu Teramoto, Tsukasa Motoya, Shigetoshi Sugawa, Tadahiro Ohmi

    ECS Transactions　61　(3)　47-53　2014

    DOI： 10.1149/06103.0047ecst 　

  46. Flattening Technique of (551) Silicon Surface Using Xe/H-2 Plasma Peer-reviewed

    Tomoyuki Suwa, Akinobu Teramoto, Shigetoshi Sugawa, Tadahiro Ohmi

    ECS Transactions　61　(2)　401-407　2014

    DOI： 10.1149/06102.0401ecst 　

    ISSN： 1938-5862

  47. Angle-resolved photoelectron spectroscopy study on interfacial transition layer and oxidation-induced residual stress in Si(100) substrate near the interface Peer-reviewed

    Tomoyuki Suwa, Akinobu Teramoto, Kohki Nagata, Atsushi Ogura, Hiroshi Nohira, Takayuki Muro, Toyohiko Kinoshita, Shigetoshi Sugawa, Tadahiro Ohmi, Takeo Hattori

    MICROELECTRONIC ENGINEERING　109　197-199　2013/09

    DOI： 10.1016/j.mee.2013.03.004 　

    ISSN： 0167-9317

    eISSN： 1873-5568

  48. A Test Circuit for Extremely Low Gate Leakage Current Measurement of 10 aA for 80 000 MOSFETs in 80 s Peer-reviewed

    Takuya Inatsuka, Yuki Kumagai, Rihito Kuroda, Akinobu Teramoto, Tomoyuki Suwa, Shigetoshi Sugawa, Tadahiro Ohmi

    IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING　26　(3)　288-295　2013/08

    DOI： 10.1109/TSM.2013.2260568 　

    ISSN： 0894-6507

    eISSN： 1558-2345

  49. Chemical Structure of Interfacial Transition Layer Formed on Si(100) and Its Dependence on Oxidation Temperature, Annealing in Forming Gas, and Difference in Oxidizing Species (vol 52, 031302, 2013) Peer-reviewed

    Tomoyuki Suwa, Akinobu Teramoto, Yuki Kumagai, Kenichi Abe, Xiang Li, Yukihisa Nakao, Masashi Yamamoto, Hiroshi Nohira, Takayuki Muro, Toyohiko Kinoshita, Shigetoshi Sugawa, Tadahiro Ohmi, Takeo Hattori

    JAPANESE JOURNAL OF APPLIED PHYSICS　52　(6)　2013/06

    DOI： 10.7567/JJAP.52.069203 　

    ISSN： 0021-4922

    eISSN： 1347-4065

  50. Chemical Structure of Interfacial Transition Layer Formed on Si(100) and Its Dependence on Oxidation Temperature, Annealing in Forming Gas, and Difference in Oxidizing Species Peer-reviewed

    Tomoyuki Suwa, Akinobu Teramoto, Yuki Kumagai, Kenichi Abe, Xiang Li, Yukihisa Nakao, Masashi Yamamoto, Hiroshi Nohira, Takayuki Muro, Toyohiko Kinoshita, Shigetoshi Sugawa, Tadahiro Ohmi, Takeo Hattori

    JAPANESE JOURNAL OF APPLIED PHYSICS　52　(3)　2013/03

    DOI： 10.7567/JJAP.52.031302 　

    ISSN： 0021-4922

    eISSN： 1347-4065

  51. On the Interface Flattening Effect and Gate Insulator Breakdown Characteristic of Radical Reaction Based Insulator Formation Technology Peer-reviewed

    Rihito Kuroda, Akinobu Teramoto, Xiang Li, Tomoyuki Suwa, Shigetoshi Sugawa, Tadahiro Ohmi

    JAPANESE JOURNAL OF APPLIED PHYSICS　51　(2)　2012/02

    DOI： 10.1143/JJAP.51.02BA01 　

    ISSN： 0021-4922

    eISSN： 1347-4065

  52. Densification of chemical vapor deposition silicon dioxide film using oxygen radical oxidation Peer-reviewed

    Kazumasa Kawase, Akinobu Teramoto, Hiroshi Umeda, Tomoyuki Suwa, Yasushi Uehara, Takeo Hattori, Tadahiro Ohmi

    JOURNAL OF APPLIED PHYSICS　111　(3)　2012/02

    DOI： 10.1063/1.3679553 　

    ISSN： 0021-8979

  53. Electrical Properties of Silicon Nitride Using High Density and Low Plasma Damage PECVD Formed at 400 degrees C Peer-reviewed

    Y. Nakao, A. Teramoto, T. Watanabe, R. Kuroda, T. Suwa, S. Sugawa, T. Ohmi

    ECS Transactions　45　(3)　421-428　2012

    DOI： 10.1149/1.3700907 　

    ISSN： 1938-5862

  54. Comprehensive Study on Chemical Structures of Compositional Transition Layer at SiO2/Si(100) Interface Peer-reviewed

    T. Suwa, A. Teramoto, T. Muro, T. Kinoshita, S. Sugawa, T. Hattori, T. Ohmi

    ECS Transactions　50　(4)　313-318　2012

    DOI： 10.1149/05004.0313ecst 　

    ISSN： 1938-5862

  55. Influence of Forming Gas Annealing on SiO2/Si(100) Interface Structures Formed Utilizing Oxygen Molecules Different From That Utilizing Oxygen Radicals Peer-reviewed

    Tomoyuki Suwa, Yuki Kumagai, Akinobu Teramoto, Takayuki Muro, Toyohiko Kinoshita, Shigetoshi Sugawa, Takeo Hattori, Tadahiro Ohmi

    ECS Transactions　45　(3)　453-460　2012

    DOI： 10.1149/1.3700911 　

    ISSN： 1938-5862

    eISSN： 1938-6737

  56. Evaluation for Anomalous Stress-Induced Leakage Current of Gate SiO2 Films Using Array Test Pattern Peer-reviewed

    Yuki Kumagai, Akinobu Teramoto, Takuya Inatsuka, Rihito Kuroda, Tomoyuki Suwa, Shigetoshi Sugawa, Tadahiro Ohmi

    IEEE TRANSACTIONS ON ELECTRON DEVICES　58　(10)　3307-3313　2011/10

    DOI： 10.1109/TED.2011.2161991 　

    ISSN： 0018-9383

    eISSN： 1557-9646

  57. Formation speed of atomically flat surface on Si (100) in ultra-pure argon Peer-reviewed

    Xiang Li, Akinobu Teramoto, Tomoyuki Suwa, Rihito Kuroda, Shigetoshi Sugawa, Tadahiro Ohmi

    MICROELECTRONIC ENGINEERING　88　(10)　3133-3139　2011/10

    DOI： 10.1016/j.mee.2011.06.014 　

    ISSN： 0167-9317

    eISSN： 1873-5568

  58. Highly Reliable Radical SiO2 Films on Atomically Flat Silicon Surface Formed by Low Temperature Pure Ar Annealing Peer-reviewed

    Xiang Li, Rihito Kuroda, Tomoyuki Suwa, Akinobu Teramoto, Shigetoshi Sugawa, Tadahiro Ohmi

    JAPANESE JOURNAL OF APPLIED PHYSICS　50　(10)　2011/10

    DOI： 10.1143/JJAP.50.10PB05 　

    ISSN： 0021-4922

    eISSN： 1347-4065

  59. Large-Scale Test Circuits for High-Speed and Highly Accurate Evaluation of Variability and Noise in Metal-Oxide-Semiconductor Field-Effect Transistor Electrical Characteristics Peer-reviewed

    Yuki Kumagai, Kenichi Abe, Takafumi Fujisawa, Shunichi Watabe, Rihito Kuroda, Naoto Miyamoto, Tomoyuki Suwa, Akinobu Teramoto, Shigetoshi Sugawa, Tadahiro Ohmi

    JAPANESE JOURNAL OF APPLIED PHYSICS　50　(10)　2011/10

    DOI： 10.1143/JJAP.50.106701 　

    ISSN： 0021-4922

    eISSN： 1347-4065

  60. Science-based New Silicon Technologies Exhibiting Super High Performance due to Radical-reaction-based Semiconductor Manufacturing Peer-reviewed

    Tadahiro Ohmi, Hiroaki Tanaka, Tomoyuki Suwa, Xiang Li, Rihito Kuroda

    JOURNAL OF THE KOREAN PHYSICAL SOCIETY　59　(2)　391-401　2011/08

    DOI： 10.3938/jkps.59.391 　

    ISSN： 0374-4884

    eISSN： 1976-8524

  61. Clear Difference between the Chemical Structure of SiO2/Si Interfaces Formed Using Oxygen Radicals versus Oxygen Molecules Peer-reviewed

    Tomoyuki Suwa, Yuki Kumagai, Akinobu Teramoto, Takayuki Muro, Toyohiko Kinoshita, Tadahiro Ohmi, Takeo Hattori

    ECS Transactions　35　(4)　115-122　2011

    DOI： 10.1149/1.3572279 　

    ISSN： 1938-5862

    eISSN： 1938-6737

  62. Different Properties of Erbium Silicides on Si(100) and Si(551) Orientation Surfaces Peer-reviewed

    Hiroaki Tanaka, Akinobu Teramoto, Rihito Kuroda, Yukihisa Nakao, Tomoyuki Suwa, Kazumasa Kawase, Shigetoshi Sugawa, Tadahiro Ohmi

    ECS Transactions　41　(7)　365-373　2011

    DOI： 10.1149/1.3633317 　

    ISSN： 1938-5862

    eISSN： 1938-6737

  63. Gate SiO2 Film Integrity on Ultra-Pure Argon Anneal (100) Silicon Surface Peer-reviewed

    Akinobu Teramoto, Xiang Li, Rihito Kuroda, Tomoyuki Suwa, Shigetoshi Sugawa, Tadahiro Ohmi

    ECS Transactions　41　(7)　147-156　2011

    DOI： 10.1149/1.3633294 　

    ISSN： 1938-5862

  64. Visualization of Single Atomic Steps on An Ultra-Flat Si(100) Surface by Advanced Differential Interference Contrast Microscopy Peer-reviewed

    Shin-Ichiro Kobayashi, Youn-Geun Kim, Rui Wen, Kohei Yasuda, Hirokazu Fukidome, Tomoyuki Suwa, Rihito Kuroda, Xiang Li, Akinobu Teramoto, Tadahiro Ohmi, Kingo Itaya

    ELECTROCHEMICAL AND SOLID STATE LETTERS　14　(9)　H351-H353　2011

    DOI： 10.1149/1.3597657 　

    ISSN： 1099-0062

    eISSN： 1944-8775

  65. Crystallographic orientation dependence of compositional transition and valence band offset at SiO2/Si interface formed using oxygen radicals Peer-reviewed

    T. Suwa, A. Teramoto, Y. Kumagai, K. Abe, X. Li, Y. Nakao, M. Yamamoto, Y. Kato, T. Muro, T. Kinoshita, T. Ohmi, T. Hattori

    APPLIED PHYSICS LETTERS　96　(17)　2010/04

    DOI： 10.1063/1.3407515 　

    ISSN： 0003-6951

  66. Angle-resolved phototelectron study on the structures of silicon nitride films and Si(3)N(4)/Si interfaces formed using nitrogen-hydrogen radicals (vol 104, 114112, 2008) Peer-reviewed

    Takashi Aratani, Masaaki Higuchi, Shigetoshi Sugawa, Eiji Ikenaga, Jiro Ushio, Hiroshi Nohira, Tomoyuki Suwa, Akinobu Teramoto, Tadahiro Ohimi, Takeo Hattori

    JOURNAL OF APPLIED PHYSICS　107　(6)　2010/03

    DOI： 10.1063/1.3366705 　

    ISSN： 0021-8979

  67. Atomically Flattening Technology at 850 degrees C for Si(100) Surface Peer-reviewed

    X. Li, T. Suwa, A. Teramoto, R. Kuroda, S. Sugawa, T. Ohmi

    ECS Transactions　28　(1)　299-309　2010

    DOI： 10.1149/1.3375615 　

    ISSN： 1938-5862

  68. Depth Profile of Nitrogen Atoms in Silicon Oxynitride Films Formed by Low-Electron-Temperature Microwave Plasma Nitridation Peer-reviewed

    Shigemi Murakawa, Shu-ichi Ishizuka, Toshio Nakanishi, Tomoyuki Suwa, Akinobu Teramoto, Shigetoshi Sugawa, Takeo Hattori, Tadahiro Ohmi

    JAPANESE JOURNAL OF APPLIED PHYSICS　49　(9)　2010

    DOI： 10.1143/JJAP.49.091301 　

    ISSN： 0021-4922

    eISSN： 1347-4065

  69. Complementary Metal-Oxide-Silicon Field-Effect-Transistors Featuring Atomically Flat Gate Insulator Film/Silicon Interface Peer-reviewed

    Rihito Kuroda, Akinobu Teramoto, Yukihisa Nakao, Tomoyuki Suwa, Masahiro Konda, Rui Hasebe, Xiang Li, Tatsunori Isogai, Hiroaki Tanaka, Shigetoshi Sugawa, Tadahiro Ohmi

    JAPANESE JOURNAL OF APPLIED PHYSICS　48　(4)　2009/04

    DOI： 10.1143/JJAP.48.04C048 　

    ISSN： 0021-4922

    eISSN： 1347-4065

  70. Atomically Flat Silicon Surface and Silicon/Insulator Interface Formation Technologies for (100) Surface Orientation Large-Diameter Wafers Introducing High Performance and Low-Noise Metal-Insulator-Silicon FETs Peer-reviewed

    Rihito Kuroda, Tomoyuki Suwa, Akinobu Teramoto, Rui Hasebe, Shigetoshi Sugawa, Tadahiro Ohmi

    IEEE TRANSACTIONS ON ELECTRON DEVICES　56　(2)　291-298　2009/02

    DOI： 10.1109/TED.2008.2010591 　

    ISSN： 0018-9383

    eISSN： 1557-9646

  71. UV-Raman spectroscopy study on SiO2/Si interface Peer-reviewed

    M. Hattori, T. Yoshida, D. Kosemura, A. Ogura, T. Suwa, A. Teramoto, T. Hattori, T. Ohmi

    ECS Transactions　19　(2)　55-66　2009

    DOI： 10.1149/1.3122085 　

  72. Three-step Room Temperature Wet Cleaning Process for Silicon Substrate Peer-reviewed

    Rui Hasebe, Akinobu Teramoto, Tomoyuki Suwa, Rihito Kuroda, Shigetoshi Sugawa, Tadahiro Ohmi

    ULTRA CLEAN PROCESSING OF SEMICONDUCTOR SURFACES IX　145-146　189-192　2009

    DOI： 10.4028/www.scientific.net/SSP.145-146.189 　

    ISSN： 1012-0394

  73. Data analysis technique of atomic force microscopy for atomically flat silicon surfaces Peer-reviewed

    Masahiro Konda, Akinobu Teramoto, Tomoyuki Suwa, Rihito Kuroda, Tadahiro Ohmi

    IEICE Transactions on Electronics　E92-C　(5)　664-670　2009

    DOI： 10.1587/transele.E92.C.664 　

    ISSN： 0916-8524

    eISSN： 1745-1353

  74. Three-Step Room-Temperature Cleaning of Bare Silicon Surface for Radical-Reaction-Based Semiconductor Manufacturing Peer-reviewed

    Rui Hasebe, Akinobu Teramoto, Rihito Kuroda, Tomoyuki Suwa, Shigetoshi Sugawa, Tadahiro Ohmi

    JOURNAL OF THE ELECTROCHEMICAL SOCIETY　156　(1)　H10-H17　2009

    DOI： 10.1149/1.2993153 　

    ISSN： 0013-4651

    eISSN： 1945-7111

  75. Stress-induced leakage current and random telegraph signal Peer-reviewed

    Akinobu Teramoto, Yuki Kumagai, Kenichi Abe, Takafumi Fujisawa, Shunichi Watabe, Tomoyuki Suwa, Naoto Miyamoto, Shigetoshi Sugawa, Tadahiro Ohmi

    JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B　27　(1)　435-438　2009/01

    DOI： 10.1116/1.3054269 　

    ISSN： 2166-2746

  76. Angle-resolved photoelectron study on the structures of silicon nitride films and Si3N4/Si interfaces formed using nitrogen-hydrogen radicals Peer-reviewed

    Takashi Aratani, Masaaki Higuchi, Shigetoshi Sugawa, Eiji Ikenaga, Jiro Ushio, Hiroshi Nohira, Tomoyuki Suwa, Akinobu Teramoto, Tadahiro Ohmi, Takeo Hattori

    JOURNAL OF APPLIED PHYSICS　104　(11)　2008/12

    DOI： 10.1063/1.3002418 　

    ISSN： 0021-8979

    eISSN： 1089-7550

  77. Atomically flat gate insulator/silicon (100) interface formation introducing high mobility, ultra-low noise, and small characteristics variation CMOSFET Peer-reviewed

    R. Kuroda, A. Teramoto, T. Suwa, R. Hasebe, X. Li, M. Konda, S. Sugawa, T. Ohmi

    ESSDERC 2008 - Proceedings of the 38th European Solid-State Device Research Conference　83-86　2008

    DOI： 10.1109/ESSDERC.2008.4681704 　

    ISSN： 1930-8876

  78. The cleaning method which is able to keep the smoothness of SI (100) Peer-reviewed

    Xiang Li, Xun Gu, Akinobu Teramoto, Rihito Kuroda, Rui Hasebe, Tomoyuki Suwa, Ningmei Yu, Shigetoshi Sugawa, Takashi Ito, Tadahiro Ohmi

    Proceedings - Electrochemical Society　PV 2008-1　469-474　2008

  79. Statistical evaluation for anomalous SILC of tunnel oxide using integrated array TEG Peer-reviewed

    Yuki Kumagai, Akinobu Teramoto, Shigetoshi Sugawa, Tomoyuki Suwa, Tadahiro Ohmi

    2008 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS - 46TH ANNUAL　219-+　2008

    ISSN： 1541-7026

  80. X-ray Photoelectron Spectroscopic Study of Nitrogen Depth Profile in Radical Nitrided Silicon Oxynitride Film Peer-reviewed

    KAWASE Kazumasa, UMEDA Hiroshi, INOUE Masao, SUWA Tomoyuki, TERAMOTO Akinobu, HATTORI Takeo, OHMI Tadahiro

    Journal of the Vacuum Society of Japan　50　(11)　672-677　2007/11/20

    Publisher: The Vacuum Society of Japan

    DOI： 10.3131/jvsj.50.672 　

    ISSN： 0559-8516

    More details Close

    The intensities of emission from N2+ and NH radicals in Ar/N2, Xe/N2 Ar/NH3 or Xe/NH3 plasma excited by microwave and the chemical bonding states of nitrogen atoms in silicon oxynitride film nitrided by using these plasmas were investigated. Depth profiles of composition and chemical structures in the oxynitride films were investigated by X-ray photoelectron spectroscopy combined with step etching in HF solution. The emission intensities from N2+ radical generated in Xe/N2, Ar/NH3 or Xe/NH3 plasma are less than a quarter of that from N2+ radical generated in Ar/N2 plasma. The emission from NH radical detected in Ar/NH3 or Xe/NH3 plasma is not detected in Xe/N2 or Ar/N2 plasma. The order of the nitrogen concentration near the film/substrate interface is Ar/NH3>Xe/NH3>Ar/N2>Xe/N2 plasma. Therefore, it is important for the reduction of the nitrogen concentration near the film/substrate interface to use Xe/N2 plasma in which both of the generation efficiencies of N2+ and NH radicals are low.<br>

  81. Very low bit error rate in flash memory using tunnel dielectrics formed by Kr/O-2/NO plasma oxynitridation Peer-reviewed

    Tomoyuki Suwa, Hiroto Takahashi, Yuki Kumagai, Genya Fujita, Akinobu Teramoto, Shigetoshi Sugawa, Tadahiro Ohmi

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS　46　(4B)　2148-2152　2007/04

    DOI： 10.1143/JJAP.46.2148 　

    ISSN： 0021-4922

  82. Control of nitrogen depth profile near silicon oxynitride/Si(100) interface formed by radical nitridation Peer-reviewed

    Kazumasa Kawase, Tomoyuki Suwa, Masaaki Higuchi, Hiroshi Umeda, Masao Inoue, Shimpei Tsujikawa, Akinobu Teramoto, Takeo Hattori, Shigetoshi Sugawa, Tadahiro Ohmi

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS　45　(8A)　6203-6209　2006/08

    DOI： 10.1143/JJAP.45.6203 　

    ISSN： 0021-4922

  83. Control of nitrogen depth profile and chemical bonding state in silicon oxynitride films formed by radical nitridation

    Kazumasa Kawase, Hiroshi Umeda, Masao Inoue, Shimpei Tsujikawa, Yasuhiko Akamatsu, Tomoyuki Suwa, Masaaki Higuchi, Masanori Komura, Akinobu Teramoto, Tadahiro Ohmi

    Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers　44　(10)　7395-7399　2005/10/11

    DOI： 10.1143/JJAP.44.7395 　

    ISSN： 0021-4922 1347-4065

  84. Low noise balanced-CMOS on Si(110) surface for analog/digital mixed signal circuits Peer-reviewed

    A Teramoto, T Hamada, H Akahori, K Nii, T Suwa, K Kotani, A Hirayama, S Sugawa, T Ohmi

    2003 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST　801-804　2003

Show all ︎Show first 5

Misc. 101

  1. Modification of Gallium Oxide Thin Films by Radical Oxidation Treatment

    森田拓海, 橋本圭市, 諏訪智之, 今泉文伸

    応用物理学会春季学術講演会講演予稿集(CD-ROM)　71st　2024

    ISSN： 2758-4704

  2. Statistical Measurement of Electrical Characteristics of Functional Thin Films Using Impedance Measurement Platform Technology

    齊藤宏河, 鈴木達彦, 光田薫未, 間脇武蔵, 間脇武蔵, 諏訪智之, 寺本章伸, 寺本章伸, 須川成利, 黒田理人, 黒田理人

    応用物理学会秋季学術講演会講演予稿集(CD-ROM)　84th　2023

    ISSN： 2758-4704

  3. Threshold Voltage Control of MONOS-Type LTPS TFTs

    後藤哲也, 後藤哲也, 諏訪智之, 諏訪智之, 片山慶太, 西田脩, 池上浩, 須川成利

    応用物理学会秋季学術講演会講演予稿集(CD-ROM)　84th　2023

    ISSN： 2758-4704

  4. A 1000fps High SNR Voltage-domain Global Shutter CMOS Image Sensor with Two-stage LOFIC for In-Situ Fluid Concentration Distribution Measurements Peer-reviewed

    Tetsu Oikawa, Rihito Kuroda, Keigo Takahashi, Yoshinobu Shiba, Yasuyuki Fujihara, Hiroya Shike, Maasa Murata, Chia-Chi Kuo, Yhang Ricardo Sipauba Carvalho da Silva, Tetsuya Goto, Tomoyuki Suwa, Tatsuo Morimoto, Yasuyuki Shirai, Masaaki Nagase, Nobukazu Ikeda, Shigetoshi Sugawa

    International Image Sensor Workshop　258-261　2021/09/23

  5. Analysis of Reaction and Decomposition of Isopropyl Alcohol on Copper and Copper Oxide Surfaces Toward Area-selective Processes Peer-reviewed

    Takezo Mawaki, Akinobu Teramoto, Katsutoshi Ishii, Yoshinobu Shiba, Tomoyuki Suwa, Shuji Azumo, Akira Shimizu, Kota Umezawa, Rihito Kuroda, Yasuyuki Shirai, Shigetoshi Sugawa

    5th Area-Selective Deposition Workshop　1　2021/04/06

  6. Modification of states of copper and copper oxide due to IPA treatment

    間脇武蔵, 寺本章伸, 石井勝利, 志波良信, 諏訪智之, 東雲秀司, 清水亮, 梅澤好太, 黒田理人, 白井泰雪, 須川成利

    電子情報通信学会技術研究報告(Web)　121　(71(SDM2021 22-29))　2021

    ISSN： 2432-6380

  7. Operation Principle and Structure of Normally-off Floating Gate GaN HEMT with Injection Gate

    119　(408)　55-58　2020/01/31

    Publisher: 電子情報通信学会

    ISSN： 0913-5685

  8. Operation Principle and Structure of Normally-off Floating Gate GaN HEMT with Injection Gate

    119　(409)　55-58　2020/01/31

    Publisher: 電子情報通信学会

    ISSN： 0913-5685

  9. Large-Scale Evaluation of MIM Devices Using High-Precision Current Measurement Array Test Circuit

    鈴木勇人, PARK Hyeonwoo, 寺本章伸, 寺本章伸, 黒田理人, 黒田理人, 諏訪智之, 須川成利, 須川成利

    応用物理学会春季学術講演会講演予稿集(CD-ROM)　67th　2020

  10. Analysis of Effect of Drain-to-Source Voltage on Random Telegraph Noise by Statistical Measurement

    秋元瞭, 黒田理人, 黒田理人, 寺本章伸, 寺本章伸, 間脇武蔵, 市野真也, 諏訪智之, 須川成利

    電子情報通信学会技術研究報告(Web)　120　(205(SDM2020 14-21))　2020

    ISSN： 2432-6380

  11. Modification of states of copper and copper oxide due to IPA treatment

    間脇武蔵, 寺本章伸, 石井勝利, 志波良信, 諏訪智之, 東雲秀司, 清水亮, 梅澤好太, 黒田理人, 白井泰雪, 須川成利

    電子情報通信学会技術研究報告(Web)　120　(205(SDM2020 14-21))　2020

    ISSN： 2432-6380

  12. Dielectric breakdown of MgO in MRAM Peer-reviewed

    A. Teramoto, J. Tsuchimoto, H. Park, M. Hayashi, K. Tsunekawa, T. Suwa, R. Kuroda, S. Sugawa

    Special MRAM poster session IEEE International Electron Devices Meeting　4　2019/12/11

  13. Resistance Measurement Platform for Statistical Evaluation of Emerging Memory Materials with High Accuracy

    119　(239)　59-64　2019/10/23

    Publisher: 電子情報通信学会

    ISSN： 0913-5685

  14. Gas concentration distribution measurement in semiconductor process chamber using a high SNR CMOS absorption image sensor

    119　(239)　65-68　2019/10/23

    Publisher: 電子情報通信学会

    ISSN： 0913-5685

  15. Synchrotron X-ray Photoelectron Spectroscopy on interface state densities of CVDGrown SiO2/4H-SiC Sturcures Treated by Post-Deposition Treatments Peer-reviewed

    Akira Kiyoi, Tomoyuki Suwa, Kazumasa Kawase and Akinobu Teramoto

    Extended Abstracts of the 2019 International Conference on Solid State Devices and Materials　741-742　2019/09/04

  16. An Accuracy Improved Resistance Measurement Platform for Evaluation of Emerging Memory Materials Peer-reviewed

    Takeru Maeda, Yuya Omura, Rihito Kuroda, Akinobu Teramoto, Tomoyuki Suwa, Shigetoshi Sugawa

    Extended Abstracts of the 2019 International Conference on Solid State Devices and Materials　531-532　2019/09/04

  17. High Reliability CoFeB/MgO/CoFeB Magnetic Tunnel Junction Fabrication Using Low-damage Ion Beam Etching Peer-reviewed

    Hyeonwoo Park, Akinobu Teramoto, Jun-ichi Tsuchimoto, Keiichi Hashimoto, Tomoyuki Suwa, Marie Hayashi, Rihito Kuroda, Shigetoshi Sugawa

    Extended Abstracts of the 2019 International Conference on Solid State Devices and Materials　401-402　2019/09

  18. Measurement of gas concentration distribution in vacuum chamber using high SN ratio absorption imaging

    43　(18)　11-14　2019/06

    Publisher: 映像情報メディア学会

    ISSN： 1342-6893

  19. Effects of Process Gases and Gate TiN Electrode during the Post Deposition Anneal to ALD-Al2O3 Dielectric Film Peer-reviewed

    Masaya Saito, Akinobu Teramoto, Tomoyuki Suwa, Kenshi Nagumo, Yoshinobu Shiba, Rihito Kuroda, Shigetoshi Sugawa

    AVS 65th International Symposium　152　2018/10/24

  20. Statistical Analysis of Electric Characteristics Variability Using MOSFETs with Asymmetric Source and Drain

    118　(241)　51-56　2018/10/17

    Publisher: 電子情報通信学会

    ISSN： 0913-5685

  21. Impact of atomically flat SiO2/Si interface on improvement of MOS device performance Peer-reviewed

    Akinobu Teramoto, Tomoyuki Suwa, Rihito Kuroda, and Shigetoshi Sugawa

    European Advanced Materials Congress　204　2018/08/20

  22. Experimental Investigation of Localized Stress Induced Leakage Current Distribution and Its Decrease by Atomically Flattening Process (シリコン材料・デバイス)

    朴 賢雨, 黒田 理人, 後藤 哲也, 諏訪 智之, 寺本 章伸, 木本 大幾, 須川 成利

    電子情報通信学会技術研究報告 = IEICE technical report : 信学技報　117　(260)　9-14　2017/10/25

    Publisher: 電子情報通信学会

    ISSN： 0913-5685

  23. Impact of Drain Current to Appearance Probability and Amplitude of Random Telegraph Noise in Low Noise CMOS Image Sensors Peer-reviewed

    Shinya Ichino, Takezo Mawaki, Akinobu Teramoto, Rihito Kuroda, Hyeonwoo Park, Takeru Maeda, Shunichi Wakashima, Tetsuya Goto, Tomoyuki Suwa, Shigetoshi Sugawa

    Extended Abstracts of the 2017 International Conference on Solid State Devices and Materials　331-332　2017/10/22

  24. Statistical Analysis of Random Telegraph Noise in Source Follower Transistors with Various Shapes Peer-reviewed

    Shinya Ichino, Takezo Mawaki, Shunichi Wakashima, Akinobu Teramoto, Rihito Kuroda, Phillipe Gaubert, Tetsuya Goto, Tomoyuki Suwa, Shigetoshi Sugawa

    2017 International Image Sensor Workshop　39-42　2017/05/30

  25. 原子層堆積法で成膜したAl₂O₃膜界面に及ぼす酸化種の影響 (シリコン材料・デバイス)

    齋藤 雅也, 諏訪 智之, 寺本 章伸, 黒田 理人, 幸田 安真, 杉田 久哉, 林 真里恵, 土本 淳一, 石井 秀和, 志波 良信, 白井 泰雪, 須川 成利

    電子情報通信学会技術研究報告 = IEICE technical report : 信学技報　116　(270)　27-30　2016/10/26

    Publisher: 電子情報通信学会

    ISSN： 0913-5685

  26. Formation technology of Flat Surface after Selective-Epitaxial-Growth on Ion-Implanted (100) Oriented Thin SOI Wafers

    116　(270)　9-14　2016/10/26

    Publisher: 電子情報通信学会

    ISSN： 0913-5685

  27. Behavior of Random Telegraph Noise toward Bias Voltage Changing

    116　(270)　35-38　2016/10/26

    Publisher: 電子情報通信学会

    ISSN： 0913-5685

  28. Oxidizing Species Dependence of the Interface Reaction during Atomic-Layer-Deposition Process and Post-Deposition-Anneal Peer-reviewed

    Tomoyuki Suwa, Akinobu Teramoto, Yasumasa Koda, Masaya Saito, Hisaya Sugita, Marie Hayashi, Junichi Tsuchimoto, Hidekazu Ishii, Yoshinobu Shiba, Yasuyuki Shirai, Shigetoshi Sugawa

    230th ECS Meeting　1836　2016/10/05

  29. Low Leakage Current Al2O3 Metal-Insulator-Metal Capacitors Formed By Atomic Layer Deposition at Optimized Process Temperature and O2 Post Deposition Annealing

    Yasumasa Koda, Hisaya Sugita, Tomoyuki Suwa, Rihito Kuroda, Tetsuya Goto, Akinobu Teramoto, Shigetoshi Sugawa

    ECS Meeting Abstracts　MA2016-01　(23)　1174-1174　2016/04/01

    Publisher: The Electrochemical Society

    DOI： 10.1149/ma2016-01/23/1174 　

    eISSN： 2151-2043

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    Introduction In integrated circuits, Metal-Insulator-Metal (MIM) capacitor is the key passive element for filtering, decoupling and oscillating, and so on. Followings are especially important requirements; high capacitance density, low leakage current density [1]. To meet these requirements, various high-k materialshave been investigated for dielectric materials of MIM capacitors [2,3].  Atomic layer deposition (ALD) is one of the most promising methods. It is considered that the temperature of ALD is one of important parameter in relation to the supply of Trimethylaluminum (TMA) for Al2O3. A recent study reported that an excessive high temperature may cause decomposition of TMA and the substrate material must not be oxidized during the oxidation process. H2O oxidation at stage temperature of 75 °C is shown to be effective because the oxidation ability of H2O becomes low, so it is effective to form the high quality interface of Al2O3/metal. Then, it is expected to be effective to improve Al2O3 film quality by post deposition annealing (PDA). In this paper, using the developed ALD process equipment, Al2O3 film was deposited by H2O oxidation ALD at stage temperature of 75C°. The impact of the annealing on the electrical characteristics of MIM and metal-insulator-silicon (MIS) capacitors was investigated. Experiment Figures 1 and 2 show the process flow and the cross sectional schematic image of the fabricated MIM capacitors, respectively. After n-type (100) Si wafers Cleaning, SiO2 films were formed by thermal wet oxidation at 1000°C. Next, bottom TiN electrodes were formed by DC sputtering at 1kW(2.5W/cm2) with Ar/N2 flow at 300°C. To form active region, SiO2 films were deposited by atmospheric pressure chemical vapor deposition with SiH4/O2/N2 mixed gases at 400°C and the wet etching was carried out. Al2O3 films were deposited by ALD. TMA was supplied at 50°C to the chamber with the high temperature flow control system (HT-FCS) [5]. After the four times cyclic purge, H2O gas was supplied to the chamber and then TMA was oxidized to Al2O3 film. At this time, the pressure of the chamber was 133Pa and the wafer stage was 75°C. At this process condition, Al2O3 growth rate per cycle was 0.35nm/cycle nearly equaled to the thickness of mono-layer Al2O3 and high uniformity of Al2O3 film thickness in the Si-wafer was obtained [4]. In this work, 40 cycles were carried out. Next, the three types of PDA conditions were applied to investigate the effect of PDA to improve Al2O3 films: (1) without annealing; (2) O2 annealing at 400°C for 30min; (3) N2 annealing at 400°C for 30min. Finally, the top Al electrode was formed by high vacuum vaporization. As reference samples, MIS with three types of Al2O3 dielectric were prepared on n-type (100) Si wafers. Result and Discussion Figure 3 shows the leakage current density of MIM capacitors with the area of 1.0×10-4cm2 as a function of applied voltage. The thickness of Al2O3 films for without annealing, O2 annealing and N annealing were 13.7, 11.0 and 11.2nm, respectively. Here these films thickness were measured with the reference Al2O3 samples deposited on Si wafers by spectroscopic ellipsometry. Regarding the measurement conditions of leakage current, the delay time at each applied bias was set to 40sec to eliminate the transition and displacement current to accurately measure the quality of Al2O3 films. Figure 4 shows the capacitance density of MIM capacitors with the area of 1.0×10-4cm2 as a function of applied voltage at a frequency of 100kHz. As a result, the leakage current density and  the capacitance density at 1V for without annealing, O2 annealing and N2 annealing were 7.2×10-10 and ,1.2×10-10 and 1.5×10-10 A/cm-2 and 5.7, 6.8and 6.3 fF/um-2, respectively. Figure 6 shows the comparison result on capacitance density and leakage current between this work and reported MIM capacitors with various materials. From this result, the leakage current density of both of MIM and MIS using Al2O3 without the annealing were about the same level as previous works. The reduction of the leakage current and increase of capacitance density were confirmed especially for the O2 annealing and the superior characteristics in comparison to the previous works were successfully obtained. Furthermore, by measuring C-V characteristic of MIS as reference samples, the absolute value of the fixed charge density of Al2O3 film was reduced by 2.04×1012cm2 by both O2 and N2 annealing processes. Therefore, O2 annealing at 400°C is considered to be an effective PDA for the formed Al2O3 film. In conclusion, by O2 annealing at 400°C for Al2O3 film deposited by H2O oxidation ALD at relatively low temperature of 75°C is effective process sequence to achieve low leakage current MIM capacitors. Reference [1]Chit Hwei Ng, et al.,  IEEE Trans, vol.52(2005) 1399-1408 [2]S. Becu, et al., Microelectronic Eng., vol.83(2006) 2422 [3]Sang-UK Park, et al., Microelectronic Eng., vol.88(2011) 3389-3392 [4]Hisaya Sugita, et al., ECS Trans, vol.66 (2015) 305-314 [5]Michio Yamaji, et al., ECS Trans, vol.45 (2012) 429 <p></p> Figure 1 <p></p>

  30. Dynamic Response of Random Telegraph Noise Time Constants toward Bias Voltage Changing

    Tohoku-Section Joint Convention Record of Institutes of Electrical and Information Engineers, Japan　2016　64-64　2016

    Publisher: Organizing Committee of Tohoku-Section Joint Convention of Institutes of Electrical and Information Engineers, Japan

    DOI： 10.11528/tsjc.2016.0_64 　

  31. Fabrication of FinFET Structure with High Selectivity Etching Using Newly Developed SiNx Etch Gas

    115　(362)　1-4　2015/12/14

    Publisher: 電子情報通信学会

    ISSN： 0913-5685

  32. Electrical Properties of MOSFETs Introducing Atomically Flat Gate Insulator/Silicon Interface (シリコン材料・デバイス)

    後藤 哲也, 黒田 理人, 諏訪 智之

    電子情報通信学会技術研究報告 = IEICE technical report : 信学技報　115　(280)　17-22　2015/10/29

    Publisher: 電子情報通信学会

    ISSN： 0913-5685

  33. Xe/H₂プラズマを用いたシリコン基板表面の低温平坦化技術 (シリコン材料・デバイス)

    諏訪 智之, 寺本 章伸, 後藤 哲也

    電子情報通信学会技術研究報告 = IEICE technical report : 信学技報　115　(280)　13-16　2015/10/29

    Publisher: 電子情報通信学会

    ISSN： 0913-5685

  34. Effect of Oxygen Impurity on Nitrogen Radicals in Post-Discharge Flows Peer-reviewed

    Yoshinobu Shiba, Akinobu Teramoto, Tomoyuki Suwa, Kensuke Watanabe, Shinichi Nishimura, Yasuyuki Shirai, Shigetoshi Sugawa

    ECS Meeting Abstracts　MA2015-02　(47)　1848-1848　2015/07/07

    Publisher: The Electrochemical Society

    DOI： 10.1149/ma2015-02/47/1848 　

    eISSN： 2151-2043

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    Introduction Silicon nitride films (SiNx) formed at low temperature are strongly required in very shrunk LSI process. The plasma silicon nitride formation technology with low damage at low temperature has been reported [1]. We have reported that the amount of active nitridation species in the process is important to form to high quality SiNx, especially on the side wall [2]. When the oxygen impurity is remained in the process gases, the oxygen is excited during the plasma processing. Then the excited oxygen is degraded the SiNx film quality [3-6]. However, it has not been reported the effect of inactive oxygen molecules in the nitridation process. In this paper, we report the effect of the impurity oxygen in post charge flows on the process of nitride formation. Experiment Fig.1 shows the schematic diagram of the experimental setup used for the reaction products measurement in the gases. It has a mixing point placed at downstream of a Nitrogen Radical Generator [7]. The produced gases reacted from the nitrogen radicals and O2 gas are measured by Fourier Transform Infrared spectroscopy (FTIR). The impurity concentration of oxygen in N2 gas was less than 1 ppb, this indicates the oxygen impurity of supply gas did not affect the experimental results. Nitrogen radicals concentration was generated by the Nitrogen Radical Generator several ten ppm in the N2 gas [7]. The pressure in Nitrogen Radical Generator was varied from 30 to 120 kPa in the case of the N2 flow rate at 5, 7, and 10slm. The O2flow rate were varied from 8 to 190 sccm. Results and discussions Fig. 2 show the absorbance of (a)O3, (b)N2O produced from the nitrogen radicals and O2gas. Horizontal axis of Fig. 2(a) denotes the product of the oxygen partial pressure and the oxygen molecules concentration. Here, this is equivalent to the collision probability of the oxygen molecules and the oxygen molecules. The produced O3concentration increases with the increase of the collision probability. Then, horizontal axis of Fig. 2(b) denotes the product of the oxygen partial pressure and the elements' density exception of the oxygen molecules, that is, they’re nitrogen molecules and nitrogen radicals. Here, this is equivalent to the collision probability of the oxygen molecules and the nitrogen molecules including the nitrogen radicals. The produced N2O concentration decreases with the increase of the collision probability. The oxygen molecules become oxygen radicals by the colliding with the nitrogen radicals because only O3 and N2O are generated. It’s considered that the numbers of nitrogen radicals decrease at the collision with oxygen molecules. Then, Fig. 2(a) and (b) show the oxygen radicals are more easier to react to the oxygen molecules or the oxygen radicals than the nitrogen molecules or the remained nitrogen radicals. The nitrogen radicals easily transfer the energy to the oxygen, and the nitrogen become inactive. These results indicates that the oxygen impurity has strong impact on the radical nitridation process. The oxygen components, even O2molecules, must be reduced in the process using nitrogen radicals. Acknowledgement This research has been carried out at fluctuation free facility of New Industry Creation Hatchery Center, Tohoku University. References [1] Y. Nakao, et al., International Conference on Solid State Devices and Materials, Nagoya, 2011, pp905-906 [2] Y. Nakao, et al., ECS Trans. 45 (3) 421-428 (2012) [3] X.  Guo, et al., IEEE Electron Device Lett., Vol.19, No.6, pp.207 (1999). [4] D.M.Brown, et al., J. Electrochem. Soc., Vol.115, No.3, pp.311 (1968).   [5] L.He, et al., Jpn. J. Appl. Phys., vol.35, pt.1, No.2B, pp.1503 (1996).   [6] V. A. Gritsenko, et al., Thin Solid Films, Vol.51, pp.353 (1978). [7]Gaku Oinuma，et al., J. Phys. D: Appl. Phys. 41 (2008) 155204 <p></p> Figure 1 <p></p>

  35. Study on compositional transition layers at Si_3N_4/Si interface formed by radical nitridation

    SUWA Tomoyuki, TERAMOTO Akinobu, SUGAWA Shigetoshi, OHMI Tadahiro

    Technical report of IEICE. SDM　114　(255)　31-34　2014/10/16

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

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    The angle-resolved Si 2p photoelectron spectra arising from the transition layers formed on the Si_3N_4/Si interface were measured with the probing depth of nearly 2 nm. It was clarified the compositional transition layers formed at Si_3N_4/Si interface. The chemical structures of transition layers formed on Si substrate side are also discussed.

  36. Introduction of Atomically Flattening of Silicon Surface in Shallow Trench Isolation Process Technology

    GOTO Tetsuya, KURODA Rihito, AKAGAWA Naoya, SUWA Tomoyuki, TERAMOTO Akinobu, LI Xiang, OBARA Toshiki, KIMOTO Daiki, SUGAWA Shigetoshi, OHMI Tadahiro, KUMAGAI Yuki, KAMATA Yutaka, SHIBUSAWA Katsuhiko

    Technical report of IEICE. SDM　114　(255)　7-12　2014/10/16

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

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    Atomically flattening technology was introduced to the widely-used complementary metal oxide silicon (CMOS) process employing sallow trench isolation (STI) with 0.22 pm technology. To preserve atomically flat surface, wet etching processes before a gate oxidation were carried out in high-purity N_2 ambience without light. The gate SiO_2 film was formed by Kr/O_2-plasma-generated oxygen radical oxidation to preserve atomically flatness. As a result, metal oxide silicon field effect transistors (MOSFETs) having atomically flat gate insulator/Si interface was realized. Channel stop ion implantation, which avoids generating parasitic channel at the STI edge for sub-threshold region, was also studied. Thanks to the introduction of the atomically flat interface, gate oxide reliability such as breakdown electric field was improved.

  37. Analysis of trap density causing random telegraph noise in MOSFETs

    OBARA Toshiki, TERAMOTO Akinobu, Kuroda Rihito, YONEZAWA Akihiro, GOTO Tetsuya, SUWA Tomoyuki, SUGAWA Shigetoshi, OHMI Tadahiro

    Technical report of IEICE. SDM　114　(255)　55-59　2014/10/16

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

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    The incidence ratio of Random Telegraph Noise in 131,072 MOSFETs was evaluated statistically by using array test circuit. The Correlation between multi traps in three and four states RTN were evaluated and the number and density of traps that cause RTN were extracted. These analyzing methods are very effective to analyze RTN for reducing it.

  38. Atomically Flattening of Si Surface of SOI and Isolation-patterned Wafers Peer-reviewed

    T. Goto, R. Kuroda, N. Akagawa, T. Suwa, A. Teramoto, X. Li, S. Sugawa, T. Ohmi, Y. Kumagai, Y. Kamata, K. Sibusawa

    Extended Abstracts of the 2014 International Conference on Solid State Devices and Materials　670-671　2014/09/09

  39. 微小角入射X線小角散乱及び広角散乱によるSiO2薄膜中の短距離秩序性の評価

    永田晃基, 永田晃基, 徳武寛紀, 長坂将也, 小椋厚志, 廣沢一郎, 諏訪智之, 寺本章伸, 服部健雄, 大見忠弘

    応用物理学会春季学術講演会講演予稿集(CD-ROM)　61st　2014

  40. Detection of Oxidation-Induced Compressive Stress in Si(100) Substrate Near the SiO2/Si Interface by X-Ray Photoelectron Spectroscopy Peer-reviewed

    H. Nohira, T. Suwa, K. Nagata, K. Nakajima, A. Teramoto, A. Ogura, K. Kimura, T. Muro, T. Kinoshita, S. Sugawa, T. Hattori, T. Ohmi

    Extend Abstracts of 2013 International Workshop on Dielectric Thin Films For Future Electron Devices: Science and Technology　111-112　2013/11/08

  41. Detection of oxidation-induced compressive stress in Si(100) substrate near the SiO2/Si interface with atomic-scale resolution Peer-reviewed

    T. Suwa, K. Nagata, H. Nohira, K. Nakajima, A. Teramoto, A. Ogura, K. Kimura, T. Muro, T. Kinoshita, S. Sugawa, T. Hattori, T. Ohmi

    Extended Abstracts of the 2013 International Conference on Solid State Devices and Materials　610-611　2013/09/26

  42. Si surface roughness influence on nMOSFET characteristics with ultrathin HfON gate insulator formed by ECR plasma sputtering Peer-reviewed

    Dae-Hee Han, Huiseong Han, Shun-ichiro Ohmi, Tomoyuki Suwa, Philippe Gaubert, Tadahiro Ohmi

    2013 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices　241-244　2013/06/26

  43. Detection of crystalline like structures in SiO2 thin films formed using oxygen molecules/radicals Peer-reviewed

    K. Nagata, T. Yamaguchi, A. Ogura, T. Koganezawa, I. Hirosawa, T. Suwa, A. Teramoto, T. Hattori, T. Ohmi

    Proceedings of The 6th International Symposium on Advanced Science and Technology of Silicon Materials　97-100　2012/11/19

  44. Chemical structures of compositional transition layer at SiO_2/Si(100)interface

    SUWA Tomoyuki, TERAMOTO Akinobu, MURO Takayuki, KINOSHITA Toyohiko, SUGAWA Shigetoshi, HATTORI Takeo, OHMI Tadahiro

    Technical report of IEICE. SDM　112　(263)　1-4　2012/10/18

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

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    The angle-resolved Si 2p photoelectron spectra arising form the transition layers formed on the SiO_2/Si(100) interface covered with more than one SiO_2 monolayer, which is device grade, were measured with probing depth of nearly 2nm. It was found for the interface formed in dry O_2 at 900℃ that two CTLs constitute the first and second CTLs. The first CTL formed at the interface consists mainly of Si^<1+>, Si^<2+>, and Si^0 and the second CTL formed on the first CTL consists mainly of Si^<3+> and Si^<4+>. Influences of oxidation temperature, annealing in forming gas on the chemical stuctures of transition layers formed on both sides of the interface are also discussed.

  45. Low Temperature PECVD of High Quality Silicon Nitride for Gate Spacer

    NAKAO Yukihisa, TERAMOTO Akinobu, KURODA Rihito, SUWA Tomoyuki, TANAKA Hiroaki, SUGAWA Shigetoshi, OHMI Tadahiro

    Technical report of IEICE. SDM　112　(263)　21-26　2012/10/18

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

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    In order to improve the performance of metal oxide semiconductor field effect transistors (MOSFETs), chemically and thermally unstable new materials have been studied and introduced. Thin insulator films to protect these introduced materials from various chemical solutions during integration process are required in order to avoid the chemical instability of these materials. These protection films must be deposited at a low temperature to avoid the thermal instability. In this work, silicon nitride deposited by plasma enhanced chemical vapor deposition (PECVD)as the protection film was investigated. In conventional PECVD, silicon nitride at the sidewall of stepped shape is poor, because it is difficult to get a sufficient ion bombardment energy. In this work, a microwave exited plasma source that can produce a high density plasma more than 10^<11>cm^<-3> at low ion energy was used in order to improve the quality of silicon nitride at the sidewall. We obtained high quality silicon nitride at the sidewall deposited at 400℃, because a large amount of nitridation precursors against SiH_4 based precursors were supplied due to the optimization of process parameters. We fabricated MIS capacitors to evaluate the electrical properties of silicon nitride with various SiH_4 flow rate. It was found that Interface trap density between silicon nitride/Si and bulk trap density of silicon nitride can be reduced by decreasing SiH_4 flow rate. It was demonstrated that silicon nitride in this work can be applied to the gate spacer in terms of both the HF resistance and the electrical properties.

  46. Science-Based New Silicon LSI Technologies : Improvement of Silicon LSI Instead of Current Device Miniaturization

    OHMI Tadahiro, NAKAO Yukihisa, KURODA Rihito, SUWA Tomoyuki, TANAKA Hiroaki, SUGAWA Shigetoshi

    Technical report of IEICE. SDM　112　(263)　27-32　2012/10/18

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

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    Proposal of device performance improvement of Si LSI facing with complete limitations. By establishing new manufacturing technologies to fabricate LSI on any crystal orientation Si surface, we must develop balanced CMOS consisting of same device dimension nMOS and pMOS by (551) surface accumulation mode CMOS leading to realization of full CMOS system LSI..

  47. Comprehensive study on chemical structures of compositional transition layer at SiO2/Si(100) interface Peer-reviewed

    Tomoyuki Suwa, Akinobu Teramoto, Takayuki Muro, Toyohiko Kinoshita, Shigetoshi Sugawa, Takeo Hattori, Tadahiro Ohmi

    2609　2012/10/09

  48. Dependence of chemical structures of transition layer at SiO2/Si(100) interface on oxidation temperature, annealing in forming gas, and oxidizing species Peer-reviewed

    Tomoyuki Suwa, Akinobu Teramoto, Takayuki Muro, Toyohiko Kinoshita, Shigetoshi Sugawa, Takeo Hattori, Tadahiro Ohmi

    Extended Abstracts of the 2012 International Conference on Solid State Devices and Materials　28-29　2012/09/26

  49. Changes in SiO2/Si(100) Interface Structure Induced by Forming Gas Annealing Peer-reviewed

    Tomoyuki Suwa, Yuki Kumagai, Akinobu Teramoto, Takayuki Muro, Toyohiko Kinoshita, Shigetoshi Sugawa, Takeo Hattori, Tadahiro Ohmi

    221st Meeting of The Electrochemical Society　712　2012/05/07

  50. A Test Circuit for Extremely Low Gate Leakage Current Measurement of 10 aA for 80,000 MOSFETs in 80s Peer-reviewed

    Y. Kumagai, T. Inatsuka, R. Kuroda, A. Teramoto, T. Suwa, S. Sugawa, T.Ohmi

    2012 IEEE INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES　131-136　2012/03/19

  51. 微小角入射X線回折による熱酸化およびラジカル酸化SiO2薄膜中の結晶様構造の評価

    永田晃基, 永田晃基, 山口拓也, 小椋厚志, 小金澤智之, 廣澤一郎, 諏訪智之, 寺本章伸, 服部健雄, 大見忠弘

    応用物理学会学術講演会講演予稿集(CD-ROM)　73rd　2012

  52. Evaluation of crystalline phase in SiO2 thin film using Grazing incidence X-ray diffraction

    永田晃基, 永田晃基, 山口拓也, 小椋厚志, 小金澤智之, 廣澤一郎, 諏訪智之, 寺本章伸, 服部健雄, 大見忠弘

    電子情報通信学会技術研究報告　112　(263(SDM2012 89-97))　2012

    ISSN： 0913-5685

  53. Different properties of erbium silicides on Si(100) and Si(551) orientation surfaces Peer-reviewed

    H. Tanaka, A. Teramoto, R. Kuroda, Y. Nakao, T. Suwa, S. Sugawa, T. Ohmi

    2011/11/13

  54. Clear Difference between the Chemical Structure of SiO_2/Si Interfaces Formed Using Oxygen Radicals and Oxygen Molecules

    SUWA Tomoyuki, KUMAGAI Yuki, TERAMOTO Akinobu, KINOSHITA Toyohiko, MURO Takayuki, HATTORI Takeo, OHMI Tadahiro

    Technical report of IEICE. SDM　111　(249)　49-52　2011/10/13

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

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    Soft-x-ray-excited angle-resolved photoelectron spectroscopy studies on silicon dioxide films formed using oxygen radicals (OR) and oxygen molecules (OM) are reported. For SiO_2 films formed using OR, 1) Si^<2+> and Si^<3+> are located in the same layer, 2) Si^<1+> is located beneath Si^<2+> or Si^<3+> layer. On the other hand, for SiO_2 films formed using OM at 900℃, 1) Si^<1+> and Si^<2+> are located in the same layer, 2) Si^<1+> and Si^<2+> are located beneath Si^<3+> layer. Therefore, the compositional and structural transition layer at the SiO_2/Si interface formed using OR is clearly different from that formed using OM.

  55. On the relation between interface flattening effect and insulator breakdown characteristic of radical reaction based insulator formation technology

    KURODA Rihito, TERAMOTO Akinobu, LI Xiang, SUWA Tomoyuki, SUGAWA Shigetoshi, OHMI Tadahiro

    Technical report of IEICE. SDM　111　(249)　21-26　2011/10/13

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

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    Gate insulator films formed by radical reaction based insulator formation technology are known to exhibit lower leakage current across ultrathin gate insulator films and lower 1/f noise compared to thermal oxides. However, a high probability of gate insulator early breakdowns has been a big stumbling block to be solved. This paper reports on the suppression of early breakdown probability by the combination of radical oxidation and atomically flat Si surface, and its clarified mechanism of the improvement based on the interface flattening effect of the radical oxidation process.

  56. Gate SiO2 Film Integrity on Ultra-Pure Argon Anneal (100) Silicon Surface Peer-reviewed

    A. Teramoto, X. Li, R. Kuroda, T. Suwa, S. Sugawa, T. Ohmi

    220th Meeting of The Electrochemical Society　2123　2011/10/10

  57. Clear Difference between Chemical Structure of SiO2/Si Interface Formed Using Oxygen Radicals and That Formed Using Oxygen Molecules Peer-reviewed

    Tomoyuki Suwa, Yuki Kumagai, Akinobu Teramoto, Takayuki Muro, Toyohiko Kinoshita, Shigetoshi Sugawa, Takeo Hattori, Tadahiro Ohmi

    Extended Abstracts of the 2011 International Conference on SOLID STATE DEVICES AND MATERIALS　22-23　2011/09/29

  58. On the Si Surface Flattening Effect and Gate Insulator Breakdown Characteristic of Radical Reaction Based Insulator Formation Technology Peer-reviewed

    Rihito Kuroda, Akinobu Teramoto, Xiang Li, Tomoyuki Suwa, Shigetoshi Sugawa and Tadahiro Ohmi

    Extended Abstracts of the 2011 International Conference on SOLID STATE DEVICES AND MATERIALS　903-904　2011/09/29

  59. Clear Difference between the Chemical Structure of SiO2/Si Interfaces Formed Using Oxygen Radicals and Oxygen Molecules Peer-reviewed

    T. Suwa, A. Teramoto, T. Ohmi, T. Hattori

    2011 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices　51-53　2011/06/29

  60. Clear difference between the chemical structure of SiO2/Si interface formed using oxygen radicals and that formed using oxygen molecules Peer-reviewed

    Tomoyuki Suwa, Yuki Kumagai, Akinobu Teramoto, Takayuki Muro, Toyohiko Kinoshita, Tadahiro Ohmi, Takeo Hattori

    219th Meeting of The Electrochemical Society　1348　2011/05/02

  61. Observation of Single Atomic Steps on an Ultra-Flat Si(100) Surface by a Differential Interference Contrast Microscope Peer-reviewed

    Youn-Geun Kim, Shin-ichiro Kobayashi, Rui Wen, Kohei Yasuda, Tomoyuki Suwa, Rihito Kuroda, Xiang Li, Akinobu Teramoto, Tadahiro Ohmi, Kingo Itaya

    The 2011 WPI-AIMR Anuual Workshop　73　2011/02/21

  62. High reliable SiO2 Films on Atomically Flat Silicon Surface Formed by Low Temperature Pure Ar Annealing Peer-reviewed

    X. Li, R. Kuroda, T. Suwa, A. Teramoto, S. Sugawa, T. Ohmi

    Extend Abstracts of 2011 International Workshop on Dielectric Thin Films For Future Electron Devices: Science and Technology　107-108　2011/01/20

  63. レーザー共焦点微分干渉顕微鏡による超平坦Si(100)表面の原子ステップ観察

    安田興平, 文鋭, 金潤根, 小林慎一郎, 吹留博一, 諏訪智之, 黒田理人, 李翔, 寺本章伸, 大見忠弘, 大見忠弘, 板谷謹悟, 板谷謹悟

    化学系学協会東北大会プログラムおよび講演予稿集　2011　2011

  64. 110禁制反射XRDを用いた原子レベルで平坦なSiO2/Si界面における歪の評価

    永田晃基, 服部真季, 小瀬村大亮, 武井宗久, 小椋厚志, 小金澤智之, 廣澤一郎, 諏訪智之, 寺本章伸, 服部健雄, 大見忠弘, 大見忠弘

    応用物理学関係連合講演会講演予稿集(CD-ROM)　58th　2011

  65. Crystallographic orientation dependence of compositional transition and valence band offset at SiO_2/Si interface formed using oxygen radicals

    SUWA Tomoyuki, KUMAGAI Yuki, TERAMOTO Akinobu, OHMI Tadahiro, HATTORI Takeo, KINOSHITA Toyohiko, MURO Takayuki

    IEICE technical report　110　(241)　61-65　2010/10/14

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

    More details Close

    The chemical and electronic-band structures of SiO_2/Si interfaces formed utilizing oxygen radicals were investigated by measuring angle-resolved photoelectron spectra arising from Si 2p and O 1s core levels and a valence band with the same probing depth. We clarified that 1) the SiO_2/Si interfaces formed exhibited an almost abrupt compositional transition, 2) the valence band offsets at the Si(111)/Si, Si(110)/Si, and Si(551)/Si interfaces are almost the same and are 0.07eV smaller than that at the SiO_2/Si(100) interface.

  66. Densification of CVD-SiO2 film using radical oxidation Peer-reviewed

    Kazumasa Kawase, Akinobu Teramoto, Hiroshi Umeda, Tomoyuki Suwa, Yasushi Uehara, Takeo Hattori, Tadahiro Ohmi

    218th Meeting of The Electrochemical Society　1387　2010/10/13

  67. Large Scale Test Circuits for Systematic Evaluation of Variability and Noise of MOSFETs’ Electrical Characteristics Peer-reviewed

    Y. Kumagai, K. Abe, T. Fujisawa, S. Watabe, R. Kuroda, N. Miyamoto, T. Suwa, A. Teramoto, S. Sugawa, T. Ohmi

    Extended Abstracts of the 2010 International Conference on SOLID STATE DEVICES AND MATERIALS　804-805　2010/09/23

  68. High Integrity Gate Insulator Films on Atomically Flat Silicon Surface

    LI X., KURODA R., SUWA T., TERAMOTO A., SUGAWA S., OHMI T.

    IEICE technical report　110　(109)　183-188　2010/06/23

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

    More details Close

    A low temperature atomically flattening technology for Si(100) wafer is developed. By annealing in ultra pure argon ambient at 800℃, atomically flat surfaces composed of atomic terraces and steps appear uniformly in the whole 200 mm wafer without generating slip line defects. Moreover, the whole 200 mm wafer surface can be atomically flattened in shorter time by increasing the argon gas flow rate and the annealing temperature of vertical furnace. Furthermore, the MOS capacitors with the atomically flat gate oxide/Si interface formed by radical oxidation on the flattened surface show superior insulating properties such as higher E_<bd> and Q_<bd>.

  69. Atomically Flattening Technology at 850 ˚C for Si(100) Surface Peer-reviewed

    X. Li, A. Teramoto, T. Suwa, R. Kuroda, S. Sugawa, T. Ohmi

    217th Meeting of The Electrochemical Society　951　2010/04/27

  70. 原子スケールで平坦なSiO2/Si界面極近傍における歪評価

    服部真季, 小瀬村大亮, 小瀬村大亮, 武井宗久, 永田晃基, 赤松弘彬, 小椋厚志, 諏訪智之, 寺本章伸, 服部健雄, 大見忠弘, 小金澤智之, 廣沢一郎

    応用物理学関係連合講演会講演予稿集(CD-ROM)　57th　2010

  71. Strain evaluation in Si at atomically flat SiO2/Si interface

    服部真季, 小瀬村大亮, 小瀬村大亮, 武井宗久, 永田晃基, 赤松弘彬, 富田基裕, 水上雄輝, 橋口裕樹, 山口拓也, 小椋厚志, 諏訪智之, 寺本章伸, 服部健雄, 大見忠弘, 大見忠弘, 小金澤智之, 廣沢一郎

    電子情報通信学会技術研究報告　110　(241(SDM2010 152-170))　2010

    ISSN： 0913-5685

  72. Study on compositional transition layers at SiO_2/Si interface formed by radical oxidation

    SUWA Tomoyuki, TERAMOTO Akinobu, OHMI Tadahiro, HATTORI Takeo, KINOSHITA Toyohiko, MURO Takayuki, KATO Yukako

    IEICE technical report　109　(257)　77-80　2009/10/22

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

    More details Close

    For clarifying the atomic structure of transition layer and valence band offset at Si/SiO_2 interface formed by radical oxidation, the photoelectron spectra of Si 2p and O 1s were evaluated by high resolution angle-resolved soft X-ray photoelectron spectroscopy. The differences of Si 2p_<3/2> spectrum from sub-oxides which construct the transition layer at Si/SiO_2 interface are observed for different Si surface orientation such as Si(100), Si(111), Si(110), and Si(551).

  73. Study on Compositional Transition Layers at Gate Dielectrics/Si Interface by using Angle-resolved X-ray Photoelectron Peer-reviewed

    Tomoyuki SUWA, Takashi ARATANI, Masaaki HIGUCHI, Shigetoshi SUGAWA, Eiji IKENAGA, Jiro USHIO, Hiroshi NOHIRA, Akinobu TERAMOTO, Tadahiro OHMI, Takeo HATTORI

    2009 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices　2B.7　2009/06/25

  74. Study on Compositional Transition Layers at Gate Dielectrics/Si Interface by using Angle-resolved X-ray Photoelectron Spectroscopy

    SUWA Tomoyuki, ARATANI Takashi, HIGUCHI Masaaki, SUGAWA Sigetoshi, IKENAGA Eiji, USHIO Jiro, NOHIRA Hiroshi, TERAMOTO Akinobu, OHMI Tadahiro, HATTORI Takeo

    IEICE technical report　109　(98)　157-160　2009/06/17

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

    More details Close

    Soft x-ray-excited angle-resolved photoemission results for nitride films formed using nitrogen-hydrogen radicals on Si(100), Si(111), and Si(110) are reported. The Si_3N_4/Si interfaces on all three surfaces are compositionally abrupt. This conclusion is based on 1) the observation that no Si atoms bonded with three N atoms and one Si atom were detected, 2) the observation that the number of Si-H bonds at the Si_3N_4/Si(110) interface is 38〜53% larger than those at the Si_3N_4/Si(100) and Si_3N_4/Si(111) interfaces indicates a dependence of the interface structure on the orientation of the substrate.

  75. UV-Raman spectroscopy study on SiO2/Si interface2009 Peer-reviewed

    M. Hattori, T. Yoshida, D. Kosemura, A. Ogura, T. Suwa, A. Teramoto, T. Hattori, T. Ohmi

    215th Meeting of The Electrochemical Society　780　2009/05/25

  76. Low Noise Balanced-CMOS on Si(110)surface for Analog/Digital Mixed Signal Circuits Peer-reviewed

    A. Teramoto, T. Hamada, H. Akahori, K. Nii, T. Suwa, K. Kotani, M. Hirayama, S. Sugawa, T. Ohmi

    2003 IEEE International ELECTRON DEVICES MEETING　33.4.1-33.4.4　2008/12/08

  77. Three-Step Room Temperature Cleaning of Bare Silicon Surface for Radical Based Semiconductor Manufacturing Peer-reviewed

    Rui Hasebe, Akinobu Teramoto, Rihito Kuroda, Tomoyuki Suwa, Shigetoshi Sugawa, Tadahiro Ohmi

    PACIFIC RIM MEETING ON ELECTROCHEMICAL AND SOLID-STATE SCIENCE (PRiME2008)The Electrochemical Society　1846　2008/10/13

  78. Correlation between Stress Induced Leakage Current and Random Telegraph Signal noise

    KUMAGAI Yuki, TERAMOTO Akinobu, ABE Kenichi, FUJISAWA Takafumi, WATABE Shunichi, SUWA Tomoyuki, MIYAMOTO Naoto, SUGAWA Shigetoshi, OHMI Tadahiro

    IEICE technical report　108　(236)　57-62　2008/10/02

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

    More details Close

    In this paper, we report the correlation between anomalous stress-induced leakage current (SILC) and random telegraph signal (RTS) in about 80,000n-MOSFETs caused by the Fowler-Nordheim (F-N) electron tunneling stress. The number of MOSFETs that has large RTS increases and the number of MOSFETs that have anomalous SILC increases by applying F-N stress, respectively. It is also found that, however, the MOSFETs that have large RTS are not correlation with ones that have large anomalous SILC.

  79. Study on Compositional Transition Layers at Gate Dielectrics/Si Interface by using Angle-resolved X-ray Photoelectron Spectroscopy

    SUWA Tomoyuki, ARATANI Takashi, HIGUCHI Masaaki, SUGAWA Sigetoshi, IKENAGA Eiji, USHIO Jiro, NOHIRA Hiroshi, TERAMOTO Akinobu, OHMI Tadahiro, HATTORI Takeo

    IEICE technical report　108　(236)　69-74　2008/10/02

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

    More details Close

    Soft x-ray-excited angle-resolved photoemission results for nitride films formed using nitrogen-hydrogen radicals on Si(100), Si(111), and Si(110) are reported. The data were obtained using synchrotron radiation which allowed the Si 2p, N 1s, and O 1s levels to be investigated with the same probing depth. The following main results were obtained: 1) The Si3N4 film is covered with one monolayer of Si-(OH)_3N. Its areal density is 15% smaller on Si(111) than on Si(100) and Si(110), 2) the Si_3N_4/Si interfaces on all three surfaces are compositionally abrupt. This conclusion is based on the observation that no Si atoms bonded with three N atoms and one Si atom were detected, 3) The observation that the number of Si-H bonds at the Si_3N_4/Si(110) interface is 38-53% larger than those at the Si_3N_4/Si(100) and Si_3N_4/Si(111) interfaces indicates a dependence of the interface structure on the orientation of the substrate.

  80. 原子オーダ平坦化ウェハ表面のAFM評価手法及びデータ解析手法

    譽田 正宏, 寺本 章伸, 諏訪 智之, 黒田 理人, 大見 忠弘

    電子情報通信学会技術研究報告. SDM, シリコン材料・デバイス　108　(236)　75-78　2008/10/02

    Publisher: 一般社団法人電子情報通信学会

    ISSN： 0913-5685

    More details Close

    Atomically flat (100) silicon surface constructed with atomic terraces and steps is realized by argon annealing at 1200℃ on (100) crystal orientation large diameter wafers with precisely controlled tilt angle. An atomic terraces and steps of (100) silicon surface can be measured as an image data by the atomic force microscopy (AFM). In order to discuss the flatness and the uniformity of the atomically flat silicon surface, it is important to evaluate the roughness of each terrace. In this paper, the data analysis technique of the atomic terraces and steps of (100) silicon surface will be proposed.

  81. CMOSFET Featuring Atomically Flat Gate Insulator Film/Silicon Interface on (100) Orientation Surface Peer-reviewed

    R. Kuroda, A. Teramoto, T. Suwa, Y. Nakao, S. Sugawa, T. Ohmi

    Extended Abstracts of the 2008 International Conference on SOLID STATE DEVICES AND MATERIALS　706-707　2008/09/25

  82. 3-step room temperature wet cleaning process for silicon substrate Peer-reviewed

    R. Hasebe, A. Teramoto, R Kuroda, T. Suwa, S. Sugawa, T. Ohmi

    9th International Symposium on Ultra Clean Processing of Semiconductor Surfaces　136-137　2008/09/24

  83. The data analysis technique of the atomic force microscopy for the atomically flat silicon surface Peer-reviewed

    Masahiro Konda, Akinobu Teramoto, Tomoyuki Suwa, Rhito Kuroda, Tadahiro Ohmi

    2008 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices　265-269　2008/07/09

  84. The data analysis technique of the atomic force microscopy for the atomically flat silicon surface

    KONDA Masahiro, TERAMOTO Akinobu, SUWA Tomoyuki, KURODA Rihito, OHMI Tadahiro

    IEICE technical report　108　(122)　265-269　2008/07/02

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

    More details Close

    Atomically flat (100) silicon surface constructed with atomic terraces and steps is realized by argon annealing at 1200℃ on (100) crystal orientation large diameter wafers with precisely controlled tilt angle. An atomic terraces and steps of (100) silicon surface can be measured as an image data by the atomic force microscopy (AFM). In order to discuss the flatness and the uniformity of the atomically flat silicon surface, it is important to evaluate the roughness of each terrace. In this paper, the data analysis technique of the atomic terraces and steps of (100) silicon surface will be proposed.

  85. High Performance Accumulation Mode FD-SOI MOSFETs on Si(100) and (110) Surfaces

    CHENG W., TERAMOTO A., KURODA R., TYE C., WATABE S., SUWA T., GOTO T., IMAIZUMI F., SUGAWA S., OHMI T.

    IEICE technical report　107　(245)　45-48　2007/09/27

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

    More details Close

    We have been successful in realizing a very high performance novel balanced CMOS on Si(110) and high performance MOSFETs on Si(100) using accumulation-mode devices. We dramatically improve the oscillation performance using the novel accumulation mode FD-SOI balanced CMOS on Si(110) surface. This technology is very useful for realizing advanced high performance analog/digital mixed circuits.

  86. Atomically Flat Silicon Surface Technology

    SUWA Tomoyuki, KURODA Rihito, TERAMOTO Akinobu, OHMI Tadahiro

    IEICE technical report　107　(245)　57-59　2007/09/27

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

    More details Close

    In this paper, atomically flat silicon surface can be realized by annealing at 1200℃ in Argon gas atmosphere, and it is found that the relationship between atomic terrace width and off angle from just (100) orientation is provided. Moreover, it is found that off angle and off direction significantly affect the atomically flat surface morphology.

  87. High Performance Low Noise CMOS Fabricated on Flattened (110)oriented Si Substrate Peer-reviewed

    Tatsufumi Hamada, Akinobu Teramoto, Hiroshi Akahori, Keiichi Nii, Tomoyuki Suwa, Masaki Hirayama, Tadahiro Ohmi

    2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices　163-166　2007/07/02

  88. Statistical Evaluation of Localized Low Gate Current through Tunnel Dielectric using Integrated Array TEG

    KUMAGAI Yuki, TERAMOTO Akinobu, SUGAWA Shigetoshi, SUWA Tomoyuki, OHMI Tadahiro

    IEICE technical report　107　(85)　27-32　2007/05/31

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

    More details Close

    Anomalous leakage current through tunnel oxides has a large current density, but it is generated in a very localized area. To analyze the leakage current, a small area and a large number of patterns should be measured and be statistically evaluated. In this study, using integrated array TEG, very low gate current (〜10^<-15>A) through tunnel dielectrics of a large number of transistors (about 1,000,000 cells) were measured and those dependence on FN electron current stress and on measurement temperature were evaluated. As a result, by applying stress, the gate current abruptly increased or decreased randomly on stress time. And in some anomalous cells the gate current abruptly decreased when the measurement temperature was increased. These phenomena are the same as have been problem for the reliability of Flash Memory. These results are useful for the analysis of gate leakage current.

  89. Formation of Ferroelectric Sr2(Ta1-x,Nbx)2O7Film (STN) on SiON formed by microwave-excited plasma and (Ba1-x,Srx)TiO3(BST) by rf sputtering applied to One-Transistor-Type Ferroelectric Memory Device Peer-reviewed

    Ichirou Takahashi, Tomoyuki Suwa, Keita Azumi, Tatsunori Isogai, Yasuyuki Shirai, Masaki Hirayama, Akinobu Teramoto, Shigetoshi Sugawa, Tadahiro Ohmi

    The 19th International Symposium on Integrated Ferroelectrics　2007/05/08

  90. Electric and interface characteristics of Si3N4 films formed by directly radical NH on Si (110) and Si (100) surfaces Peer-reviewed

    Masaaki Higuchi, Tomoyuki Suwa, Takashi Aratani, Tatsufumi Hamada, Akinobu Teramoto, Takeo Hattori, Shigetoshi Sugawa, Tadahiro Ohmi, Seiji Shinagawa, Hiroshi Nohira, Eiji Ikenaga

    37th IEEE Semiconductor Interface Specialists Conference　13　2006/12/07

  91. Radical Oxidation on Ultra Pure Silicon Surface Peer-reviewed

    Kazumasa Kawase, Masaaki Higuchi, Tomoyuki Suwa, Hiroshi Umeda, Masao Inoue, Akinobu Teramoto, Takeo Hattrori, Shigetoshi Sugawa, Tadahiro Ohmi

    210th Meeting of The Electrochemical Society　973　2006/10/31

  92. Very Low Bit Error Rate in Flash Memory Using Tunnel Dielectrics Formed by Kr/O_2/NO Plasma Oxynitridation

    SUWA Tomoyuki, KUMAGAI Yuki, TERAMOTO Akinobu, SUGAWA Shigetoshi, OHMI Tadahiro

    IEICE technical report　106　(277)　7-11　2006/09/28

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

    More details Close

    The gate leakage current which influences the charge hold time of flash memories is characterized as very localized in tunnel oxide area and relatively low in its quantity. In conventional TEG for evaluation of this leakage current, the gate leakage current are measured in relatively large area capacitors or transistors, as a result, the localized and low gate leakage current cannot be measured. In this paper, we propose the new concept TEG in which the localized gate leakage current corresponding to the bit error in the flash memory can be measured in short time. We statistically evaluated the Stress Induced Leakage Current (SILC) of all cells in very low gate leakage current region (about 10^<-16> A) in the very short time (a few seconds). In addition, we show that plasma oxynitridation using Kr/O_2/NO gases is effective in suppressing the anomalous SILC and carrier traps by statistically evaluation of 60,000 cells in proposed array TEG.

  93. Very Low Bit Error Rate in Flash Memory using Tunnel Dielectrics formed by Kr/O_2/NO Plasma Oxynitridation Peer-reviewed

    SUWA Tomoyuki, TAKAHASHI Hiroto, KUMAGAI Yuki, FUJITA Genya, TERAMOTO Akinobu, SUGAWA Shigetoshi, OHMI Tadahiro

    296-297　2006/09/13

  94. Accurate Extraction of Conduction Parameters in MOSFETs on Si(110) surface Peer-reviewed

    PHILIPPE GAUBERT, AKINOBU TERAMOTO, TATSUFUMI HAMADA, TOMOYUKI SUWA, TADAHIRO OHMI

    28th International Conference on the Physics of Semiconductors　243　2006/07/24

  95. Statistical evaluation of very low gate leakage current for bit error evaluation in Flash Memory Peer-reviewed

    T. Suwa, S. Sugawa, H. Takahashi, A. Teramoto, T. Ohmi

    The 16th Symposium of The Materials Research Society of Japan　169　2005/12/01

  96. Fabrication of ultra clean silicon surface

    KAWASE Kazumasa, UMEDA Hiroshi, INOUE Masao, SUWA Tomoyuki, HIGUCHI Masaaki, TERAMOTO Akinobu, SUGAWA Shigetoshi, OHMI Tadahiro

    IEICE technical report　105　(317)　19-24　2005/10/06

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

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    Ultra clean silicon surface without uncontrollable oxide film, organic contamination, silicon carbide or hydrogen is fabricated. Leakage current of silicon oxide film is reduced with radical oxidation on this ultra clean silicon surface. H-termination with HF treatment and inert gas annealing are required to prevent the formation of uncontrollable oxide film. Organic contamination on the silicon surface forms SiC by the reaction with silicon dangling bond which is generated by hydrogen desorption during annealing or ion shower. SiC is not removed by oxidation and deteriorates the electrical properties of silicon oxide film. The amounts of organic contamination during pumping down of load lock chamber are more than during air exposure from HF treatment to oxidation. SiC formation is prevented with inert gas substitution in atmospheric pressure in load lock chamber.

  97. Control of nitrogen depth profile and chemical bonding state in radical nitrided silicon oxide film

    KAWASE Kazumasa, UMEDA Hiroshi, INOUE Masao, SUWA Tomoyuki, HIGUCHI Masanori, KOMURA Masanori, TERAMOTO Akinobu, OHMI Tadahiro

    Technical report of IEICE. SDM　104　(336)　27-32　2004/10/14

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

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    Chemical bonding states and depth profiles of nitrogen in SiON film nitrided in Ar/N_2 plasma excited by microwave have been studied using XPS. Two types of nitriding radical species exist in this plasma. In the case of thick base oxide film, One forms Si_3≡N at the surface, the other forms N_<high> which has not been identified. N_<high> would not affect electrical properties because it is desorbed at 400℃ completely, whose temperature is near the pre-anneling temperature of poly-Si gate layer deposition. However, in the case of thin base oxide film, the nitriding radical species forming N_<high> reach Si substrate earlier than the other species forming Si_3≡N, and it forms Si_3≡N at the interface. It would cause EOT increasing and NBTI deterioration. Therefore, suppressing the generation of this nitriding species forming N_<high> is effective to prevent Si_3≡N formation at the interface.

  98. HIGH PERFORMANCE LOW NOISE CMOS FABRICATED ON FLATTENED (110)ORIENTED SI SUBSTRATE

    Tatsufumi Hamada, Akinobu Teramoto, Hiroshi Akahori, Keiichi Nii, Tomoyuki Suwa, Masaki Hirayama, Tadahiro Ohmi

    The 2nd Student-Organizing International Mini-Conference on Information Electronics System　141-144　2004/10

  99. High Performance Low Noise CMOS Fabricated on Flattened (110) oriented Si Substrate

    HAMADA Tatsufumi, TERAMOTO Akinobu, AKAHORI Hiroshi, NII Keiichi, SUWA Tomoyuki, HIRAYAMA Masaki, OHMI Tadahiro

    Technical report of IEICE. SDM　104　(156)　41-44　2004/06/24

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

    More details Close

    This paper investigated the CMOS characteristics on Si(11O) surface by using surface flattening process and radical oxidation technology. Surface micro-roughness on Si(110) surface increases by using conventional RCA Cleaning. We developed the Si(11O) surface flattening technology. By forming a MOS device on flattened Si(11O) surface, the high-speed and low 1/f noise p-MOSFET can be realized. Furthermore, the current drivability of p-MOS and n-MOS has balanced in the CMOS (balanced CMOS) on Si(11O) surface can be also realized. These are very useful to the analog/digital mixed signal circuits.

  100. Electrical Characteristics of MOSFET on Flattened (110) oriented Si substrate

    HAMADA Tatsufumi, AKAHORI Hiroshi, NII keiichi, SUWA Tomoyuki, HIRAYAMA Masaki, TERAMOTO Akinobu, OHMI Tadahiro

    Technical report of IEICE. SDM　103　(374)　27-32　2003/10/21

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

    More details Close

    Electrical Characteristics of MOSFETs on flattened Si(11O) oriented surface were investigated. Using oxygen radical oxidation technology by Microwave-Excited high density plasma and (110) surface flattening method, high performance and low 1/f noise MOSFETs on (110) oriented Si substrate were obtained.

  101. Influence of the noble gas atom contained in the plasma oxides and nitrides on the electrical properties

    HIGUCHI Masaaki, SUWA Tomoyuki, OHSHIMA Ichiro, CHENG Weitao, TERAMOTO Akinobu, HIRAYAMA Masaki, SUGAWA Shigetoshi, OHMI Tadahiro

    Technical report of IEICE. SDM　102　(415)　19-26　2002/10/21

    Publisher: The Institute of Electronics, Information and Communication Engineers

    ISSN： 0913-5685

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    High integrity SiO_2, Si_3N_4 gate dielectric films grown at 400℃ by the microwave-excited high-density plasma has been developed. In this paper, it is confirmed that Kr atoms includes in the insulator films formed by the microwave-excited high-density plasma. We clarified that amount of residual Kr atoms have influence on the growth rate of the films and the electric characteristics of MOS devices.

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Presentations 2

  1. [1] 成膜工程と連動した基板表面処理と表面イニシャライズ Invited

    諏訪智之

    CVD反応分科会第34回シンポジウム（公益社団法人化学工学会）　2021/08/04

  2. [2] 微細化に依らないMOSトランジスタの性能向上へのアプローチ Invited

    諏訪智之

    SPring-8利用推進協議会 次世代先端デバイス研究会(第3回)　2016/06/18

Industrial Property Rights 13

  1. 窒化膜成膜方法

    西村 真一, 渡辺 謙資, 山田 義人, 寺本 章伸, 諏訪 智之, 志波 良信

    特許第6963264号

    Property Type: Patent

  2. 成膜装置及び成膜方法

    寺本 章伸, 諏訪 智之, 志波 良信, 清水 亮, 石井 勝利

    特許第6640160号

    Property Type: Patent

  3. 電界効果トランジスタおよびその駆動方法

    寺本 章伸, 諏訪 智之, 黒田 理人, 古川 貴一

    特許第6487288号

    Property Type: Patent

  4. 3次元構造のMOSFET及びその製造方法

    諏訪 智之, 田中 宏明, 大見 忠弘

    特許第5553256号

    Property Type: Patent

  5. シリコンウェーハの原子オーダー平坦化表面処理方法及び熱処理装置

    大見 忠弘, 寺本 章伸, 諏訪 智之

    Property Type: Patent

  6. シリコンウェーハおよび半導体装置

    大見 忠弘, 寺本 章伸, 諏訪 智之

    Property Type: Patent

  7. 選択成膜方法

    東雲 秀司, 梅澤 好太, 石井 勝利, 清水 亮, 寺本 章伸, 諏訪 智之, 白井 泰雪, 間脇 武蔵

    Property Type: Patent

  8. 窒化物半導体トランジスタ装置

    寺本 章伸, 黒田 理人, 諏訪 智之, 白田 理一郎, 高谷 信一郎

    Property Type: Patent

  9. 半導体デバイス

    森 敬一朗, 佐俣 秀一, 寺本 章伸, 黒田 理人, 諏訪 智之

    Property Type: Patent

  10. 化学物質感応性センサ及び該センサを使用する計測方法

    寺本 章伸, 諏訪 智之, 渡辺 浩志

    Property Type: Patent

  11. 半導体素子の形成方法

    後藤 哲也, 寺本 章伸, 黒田 理人, 諏訪 智之

    Property Type: Patent

  12. 半導体素子、その素子を集積した半導体装置

    大見 忠弘, 諏訪 智之

    Property Type: Patent

  13. 半導体基板および半導体装置

    大見 忠弘, 寺本 章伸, 諏訪 智之, 黒田 理人, 工藤 秀雄, 速水 善範

    Property Type: Patent

Show all Show first 5

Research Projects 4

  1. ポリイミド基板上に集積した多数TFTの自己整合的な特性ばらつき均一化技術の確立

    後藤 哲也, 諏訪 智之

    Offer Organization: 日本学術振興会

    System: 科学研究費助成事業 基盤研究(C)

    Category: 基盤研究(C)

    Institution: 東北大学

    2022/04/01 - 2025/03/31

  2. Study on fabrication process of 3-D structured MOS transistor having atomically flat gate insulator/Si interface

    OHMI Tadahiro, HIRAYAMA Masaki, GOTO Tetsuya, SUWA Tomoyuki

    Offer Organization: Japan Society for the Promotion of Science

    System: Grants-in-Aid for Scientific Research Grant-in-Aid for Specially Promoted Research

    Category: Grant-in-Aid for Specially Promoted Research

    Institution: Tohoku University

    2010/04/21 - 2015/03/31

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    In this study, the atomically flattening technology of any crystalline silicon surface was developed ; in the result the electrical reliability was drastically improved. By an introduction of this technology, 3-D structured MOS transistor having atomically flat gate insulator/Si interface can be fabricated.

  3. Determination of Insulator/Si Interface Structure by Extremely Sensitive and Highly Resolved Interfacial Analyses

    HATTORI Takeo, KIMURA Kenji, NAKAJIMA Kaoru, NOHIRA Hiroshi, TERAMOTO Akinobu, SUWA Tomoyuki, KINOSHITA Toyohiko

    Offer Organization: Japan Society for the Promotion of Science

    System: Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (B)

    Category: Grant-in-Aid for Scientific Research (B)

    Institution: Tohoku University

    2007 - 2009

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    Composition and chemical structures of high quality Si-SiO_2 systems formed using oxygen radicals and those of high quality Si-Si_3N_4 systems formed using nitrogen-hydrogen radicals were studied by measuring angle-resolved photoelectron spectra arising from Si 2p and O 1s core levels and valence band with the same probing depth.

  4. 高品質・高信頼性絶縁膜の形成プロセスに関する研究

    諏訪 智之

    Offer Organization: 日本学術振興会

    System: 科学研究費助成事業 若手研究(スタートアップ)

    Category: 若手研究(スタートアップ)

    Institution: 東北大学

    2006 - 2007

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    MOSFETの高性能化のためには、薄膜かつ高信頼性を有するゲート絶縁膜形成技術の開発が必要不可欠である。特にフラッシュメモリに用いられるトンネル絶縁膜は薄膜化が停滞しており、フラッシュメモリの高性能化のためにも薄膜化は必須課題である。平成19年度は、トンネル絶縁膜形の開発課題に対して、(1)100万個規模のゲート電流の統計評価による異常ゲート電流の挙動を調べ信頼性向上のための指針を得る、(2)ゲート絶縁膜/シリコン界面を原子オーダーで平坦化し信頼性の向上とMOSFETの高性能化を目指す、以上の点に注力し研究を実施した。(1)については、大規模ゲート電流評価TEGを用いて、100万セル規模で膜厚7.7nmの熱酸化膜のゲート電流について温度特性を評価したところ、異常なゲート電流の流れるセルでは測定温度に対してゲート電流がランダムに増減することを明らかにした。同様の現象を従来のゲート電流評価で捕らえることは極めて困難であり、比較的簡易なTEGでフラッシュメモリの信頼性において問題となる現象を見出したことは非常に重要な成果である。(2)については、Si(100)面ウェハをAr雰囲気中1200℃で熱処理を行うことにより、ウェハ表面がSi原子1層(0.135nm)のステップと凹凸の無いテラスから形成される原子オーダーで平坦な表面を実現した。得られた原子オーダー平坦表面を従来の熱酸化法により酸化膜を形成すると、酸化膜/シリコン基板界面が荒れてしまうのに対し、酸素ラジカルにより形成した酸化膜/シリコン基板界面は原子オーダーの平坦性を保つことを明らかにした。さらに、原子オーダー平坦とラジカル酸化膜により作製したMOSデバイスの絶縁耐圧特性を評価した結果、耐圧の向上とばらつきの抑制に有効であることを明らかにした。これらの成果はMOSFETの信頼性向上とともに高電流駆動能力化へ貢献するものである。