Details of the Researcher

PHOTO

Kazuhiko Endo
Section
Institute of Fluid Science
Job title
Professor
Degree
  • 博士(工学)(早稲田大学)

  • 工学修士(早稲田大学)

e-Rad No.
60392594
Researcher ID

Research History 3

  • 2022/11 - Present
    東北大学 流体科学研究所

  • 2004/04 - 2022/11
    National Institute of Advanced Industrial Science and Technology

  • 1993/04 - 2004/03
    NEC Corporation

Committee Memberships 16

  • Symposium on VLSI Technology and Circuits Technical Program Chair

    2023/07 - Present

  • 電気学会 ナノエレクトロニクス機能化・応用技術調査専門委員会 委員長

    2021/03 - Present

  • JSAP The System Device Roadmap Committee of Japan Steering Committee

    2021 - Present

  • Advanced Metallization Conference Program Committee

    2020 - Present

  • Silicon Nanoelectronics Workshop Program Committee

    2009 - Present

  • 応用物理学会 シリコンテクノロジー分科会 幹事長

    2021/04 - 2023/03

  • 応用物理学会 論文賞選考委員

    2021 - 2022

  • Symposium on VLSI Technology and Circuits Technical Program Committee

    2016 - 2022

  • 応用物理学会シリコンテクノロジー分科会 副幹事長

    2018 - 2021

  • 電気学会 ナノエレクトロニクス新機能創出・集積化技術調査専門委員会 委員

    2015 - 2020

  • 応用物理学会シリコンテクノロジー分科会 幹事

    2008 - 2018

  • 応用物理学会 応用物理学会 代議員

    2016/02 - 2017/01

  • IEEE International Conference on Nanotechnology 2016 Organizing Committee

    2015 - 2016

  • IEEE International Nanoelectronics Conference 2014 Organizing Committee

    2013 - 2015

  • International Electron Device Meeting Program Committee

    2012 - 2013

  • Solid State Devies and Materials Steering Comittee

    2006 - 2010

Show all ︎Show first 5

Awards 3

  1. IEEE Nano 2016 Best Paper Award

    2016/10 IEEE

  2. ADMETA AWARD 2003

    2003/10

  3. 応用物理学会講演奨励賞

    1998 応用物理学会

Papers 190

  1. Effect of Interfacial Oxide Layers on Self-Doped PEDOT/Si Hybrid Solar Cells International-journal Peer-reviewed

    Aditya Saha, Ryuji Oshima, Daisuke Ohori, Takahiko Sasaki, Hirokazu Yano, Hidenori Okuzaki, Takashi Tokumasu, Kazuhiko Endo, Seiji Samukawa

    Energies 16 6900-1-6900-14 2023/09/30

    DOI: 10.3390/en16196900  

  2. Hydrogen iodide (HI) neutral beam etching characteristics of InGaN and GaN for micro-LED fabrication

    Daisuke Ohori, Takahiro Ishihara, Xuelun Wang, Kazuhiko Endo, Tsau-Hua Hsieh, Yiming Li, Nobuhiro Natori, Kazuma Matsui, Seiji Samukawa

    Nanotechnology 2023/09/03

    DOI: 10.1088/1361-6528/acd856  

  3. Defect generation and recovery in high-k HfO2/SiO2/Si stack fabrication Peer-reviewed

    Shota Nunomura, Hiroyuki Ota, Toshifumi Irisawa, Kazuhiko Endo, Yukinori Morita

    Applied Physics Express 2023/06/01

    DOI: 10.35848/1882-0786/acdc82  

  4. Lifetime of photoexcited carriers in space-controlled Si nanopillar/SiGe composite films investigated by a laser heterodyne photothermal displacement method Peer-reviewed

    Tomoki Harada, Daisuke Ohori, Kazuhiko Endo, Seiji Samukawa, Tetsuo Ikari, Atsuhiko Fukuyama

    Journal of Applied Physics 133 (12) 2023/03/28

    DOI: 10.1063/5.0146578  

    ISSN: 0021-8979

    eISSN: 1089-7550

  5. 2023 IEEE Symposium on VLSI Technology and Circuits [Conference Reports]

    Alvin Loke, Mitsuya Fukazawa, Kazuhiko Endo

    IEEE Solid-State Circuits Magazine 2023

    DOI: 10.1109/MSSC.2023.3315950  

  6. Room-temperature and high-quality HfO<inf>2</inf>/SiO<inf>2</inf>gate stacked film grown by neutral beam enhanced atomic layer deposition Peer-reviewed

    Beibei Ge, Daisuke Ohori, Yi Ho Chen, Takuya Ozaki, Kazuhiko Endo, Yiming Li, Jenn Hwan Tarng, Seiji Samukawa

    Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films 40 (2) 2022/03/01

    DOI: 10.1116/6.0001607  

    ISSN: 0734-2101

    eISSN: 1520-8559

  7. Flash lamp annealing processing to improve the performance of high-Sn content GeSn n-MOSFETs Peer-reviewed

    Hiroshi Oka, Wataru Mizubayashi, Yuki Ishikawa, Noriyuki Uchida, Takahiro Mori, Kazuhiko Endo

    Applied Physics Express 14 (9) 2021/09

    DOI: 10.35848/1882-0786/ac1a47  

    ISSN: 1882-0778

    eISSN: 1882-0786

  8. Surface wettability of silicon nanopillar array structures fabricated by biotemplate ultimate top-down processes Peer-reviewed

    Sou Takeuchi, Daisuke Ohori, Masahiro Sota, Teruhisa Ishida, Yiming Li, Jenn Hwan Tarng, Kazuhiko Endo, Seiji Samukawa

    Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films 39 (2) 2021/03/01

    DOI: 10.1116/6.0000770  

    ISSN: 0734-2101

    eISSN: 1520-8559

  9. Non-equilibrium solid-phase growth of amorphous GeSn layer on Ge-on-insulator wafer induced by flash lamp annealing Peer-reviewed

    Hiroshi Oka, Wataru Mizubayashi, Yuki Ishikawa, Noriyuki Uchida, Takahiro Mori, Kazuhiko Endo

    Applied Physics Express 14 (2) 2021/02

    DOI: 10.35848/1882-0786/abdac4  

    ISSN: 1882-0778

    eISSN: 1882-0786

  10. Management of Phonon Transport in Lateral Direction for Gap-Controlled Si Nanopillar/SiGe Interlayer Composite Materials Peer-reviewed

    Daisuke Ohori, Min Hui Chuang, Asahi Sato, Sou Takeuchi, Masayuki Murata, Atsushi Yamamoto, Ming Yi Lee, Kazuhiko Endo, Yiming Li, Jenn Hwan Tarng, Yao Jen Lee, Seiji Samukawa

    IEEE Open Journal of Nanotechnology 2 148-152 2021

    Publisher: Institute of Electrical and Electronics Engineers ({IEEE})

    DOI: 10.1109/OJNANO.2021.3131165  

    eISSN: 2644-1292

  11. High electron mobility germanium FinFET fabricated by atomic layer defect-free and roughness-free etching

    Daisuke Ohori, Takuya Fujii, Shuichi Noda, Wataru Mizubayashi, Kazuhiko Endo, Yao Jen Lee, Jenn Hwan Tarng, Yiming Li, Seiji Samukawa

    IEEE Open Journal of Nanotechnology 2 26-30 2021

    DOI: 10.1109/OJNANO.2021.3055150  

    eISSN: 2644-1292

  12. High-quality nanodisk of InGaN/GaN MQWs fabricated by neutral-beam-etching and GaN regrowth: Towards directional micro-LED in top-down structure

    Kexiong Zhang, Tokio Takahashi, Daisuke Ohori, Guangwei Cong, Kazuhiko Endo, Naoto Kumagai, Seiji Samukawa, Mitsuaki Shimizu, Xuelun Wang

    Semiconductor Science and Technology 35 (7) 2020/07

    DOI: 10.1088/1361-6641/ab8539  

    ISSN: 0268-1242

    eISSN: 1361-6641

  13. Analysis of charge-to-hot-carrier degradation in Ge pFinFETs

    Wataru Mizubayashi, Hiroshi Oka, Koichi Fukuda, Yuki Ishikawa, Kazuhiko Endo

    IEEE International Reliability Physics Symposium Proceedings 2020- 2020/04/01

    Publisher: Institute of Electrical and Electronics Engineers Inc.

    DOI: 10.1109/IRPS45951.2020.9129279  

    ISSN: 1541-7026

  14. Correction: Analytical Thermal Model for Self-Heating in Advanced FinFET Devices With Implications for Design and Reliability (IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2013) 32:7 (1045-1058) DOI: 10.1109/TCAD.2013.2248194)

    Chuan Xu, Seshadri K. Kolluri, Kazhuhiko Endo, Kaustav Banerjee

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 39 (1) 277-277 2020/01

    Publisher: Institute of Electrical and Electronics Engineers ({IEEE})

    DOI: 10.1109/TCAD.2019.2944583  

    ISSN: 0278-0070

    eISSN: 1937-4151

  15. Performance improvement of Ge fin field-effect transistors by post-fin-fabrication annealing Peer-reviewed

    Wataru Mizubayashi, Hiroshi Oka, Takahiro Mori, Yuki Ishikawa, Seiji Samukawa, Kazuhiko Endo

    Japanese Journal of Applied Physics 59 (SI) 2020

    DOI: 10.35848/1347-4065/ab87f5  

    ISSN: 0021-4922

    eISSN: 1347-4065

  16. Highly water-repellent nanostructure on quartz surface based on cassie-baxter model with filling factor

    Daisuke Ohori, Sou Takeuchi, Masahiro Sota, Teruhisa Ishida, Yiming Li, Jenn Hwan Tarng, Kazuhiko Endo, Seiji Samukawa

    IEEE Open Journal of Nanotechnology 1 (1) 1-5 2020

    Publisher: Institute of Electrical and Electronics Engineers ({IEEE})

    DOI: 10.1109/OJNANO.2020.2980629  

    eISSN: 2644-1292

  17. Microwave Annealing Technologies for Variability Reduction of Nanodevices: A Review of Their Impact on FinFETs

    Kazuhiko Endo, Yao Jen Lee

    IEEE Nanotechnology Magazine 13 (6) 34-38 2019/12

    Publisher: Institute of Electrical and Electronics Engineers ({IEEE})

    DOI: 10.1109/MNANO.2019.2941029  

    ISSN: 1932-4510

    eISSN: 1942-7808

  18. The 2D Materials Used for Nanodevice Applications: Utilizing Aggressively Scaled Transistors

    Kazuhiko Endo, Yasumitsu Miyata, Toshifumi Irisawa

    IEEE Nanotechnology Magazine 13 (6) 39-42 2019/12

    Publisher: Institute of Electrical and Electronics Engineers ({IEEE})

    DOI: 10.1109/MNANO.2019.2941030  

    ISSN: 1932-4510

    eISSN: 1942-7808

  19. Near-Complete Elimination of Size-Dependent Efficiency Decrease in GaN Micro-Light-Emitting Diodes Peer-reviewed

    Jun Zhu, Tokio Takahashi, Daisuke Ohori, Kazuhiko Endo, Seiji Samukawa, Mitsuaki Shimizu, Xue Lun Wang

    Physica Status Solidi (A) Applications and Materials Science 216 (22) 2019/11/01

    DOI: 10.1002/pssa.201900380  

    ISSN: 1862-6300

    eISSN: 1862-6319

  20. Atomic layer defect-free etching for germanium using HBr neutral beam

    Takuya Fujii, Daisuke Ohori, Shuichi Noda, Yosuke Tanimoto, Daisuke Sato, Hideyuki Kurihara, Wataru Mizubayashi, Kazuhiko Endo, Yiming Li, Yao Jen Lee, Takuya Ozaki, Seiji Samukawa

    Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films 37 (5) 2019/09/01

    DOI: 10.1116/1.5100547  

    ISSN: 0734-2101

    eISSN: 1520-8559

  21. Quantification of Spin Drift in Devices with a Heavily Doped Si Channel Peer-reviewed

    A. Spiesser, Y. Fujita, H. Saito, S. Yamada, K. Hamaya, W. Mizubayashi, K. Endo, S. Yuasa, R. Jansen

    Physical Review Applied 11 (4) 2019/04

    DOI: 10.1103/PhysRevApplied.11.044020  

    eISSN: 2331-7019

  22. Atomic layer germanium etching for 3D Fin-FET using chlorine neutral beam Peer-reviewed

    Daisuke Ohori, Takuya Fujii, Shuichi Noda, Wataru Mizubayashi, Kazuhiko Endo, En Tzu Lee, Yiming Li, Yao Jen Lee, Takuya Ozaki, Seiji Samukawa

    Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films 37 (2) 2019/03/01

    DOI: 10.1116/1.5079692  

    ISSN: 0734-2101

    eISSN: 1520-8559

  23. Characteristics of Carrier Mobility and Phonon Scattering by Controlling Spacing of Si Nanopillars in SiGe

    Ohori Daisuke, Kuboyama Hidesato, Murata Masayuki, Yamamoto Atsushi, Nomura Masahiro, Endo Kazuhiko, Samukawa Seiji

    JSAP Annual Meetings Extended Abstracts 2019.1 3716-3716 2019/02/25

    Publisher: The Japan Society of Applied Physics

    DOI: 10.11470/jsapmeeting.2019.1.0_3716  

    eISSN: 2436-7613

  24. Multidomain Dynamics of Ferroelectric Polarization and its Coherency-Breaking in Negative Capacitance Field-Effect Transistors

    Hiroyuki Ota, Tsutomu Ikegami, Koichi Fukuda, Junichi Hattori, Hidehiro Asai, Kazuhiko Endo, Shinji Migita, Akira Toriumi

    Technical Digest - International Electron Devices Meeting, IEDM 2018- 9.1.1-9.1.4 2019/01/16

    Publisher: Institute of Electrical and Electronics Engineers Inc.

    DOI: 10.1109/IEDM.2018.8614531  

    ISSN: 0163-1918

  25. High efficiency 100-nm-sized InGaN/GaN active region fabricated by neutral-beam-etching and GaN regrowth for directional micro-LED

    Kexiong Zhang, Tokio Takahashi, Daisuke Ohori, Guangwei Cong, Kazuhiko Endo, Naoto Kumagai, Seiji Samukawa, Mitsuaki Shimizu, Xuelun Wang

    2019 COMPOUND SEMICONDUCTOR WEEK (CSW) 2019

  26. Steep switching less than 15 mV dec-1 in silicon-on-insulator tunnel FETs by a trimmed-gate structure

    Hidehiro Asai, Takahiro Mori, Takashi Matsukawa, Junichi Hattori, Kazuhiko Endo, Koichi Fukuda

    Japanese Journal of Applied Physics 58 (SB) 2019

    DOI: 10.7567/1347-4065/ab01d5  

    ISSN: 0021-4922

    eISSN: 1347-4065

  27. Multidomain Dynamics of Ferroelectric Polarization and its Coherency-Breaking in Negative Capacitance Field-Effect Transistors Peer-reviewed

    Hiroyuki Ota, Tsutomu Ikegami, Koichi Fukuda, Junichi Hattori, Hidehiro Asai, Kazuhiko Endo, Shinji Migita, Akira Toriumi

    2018 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) 2018/12

    ISSN: 2380-9248

  28. CVD growth technologies of layered MX<inf>2</inf> materials for real LSI applications - Position and growth direction control and gas source synthesis

    T. Irisawa, N. Okada, W. Mizubayashi, T. Mori, W. H. Chang, K. Koga, A. Ando, K. Endo, S. Sasaki, T. Endo, Y. Miyata

    IEEE Journal of the Electron Devices Society 6 1159-1163 2018/09/17

    DOI: 10.1109/JEDS.2018.2870893  

    eISSN: 2168-6734

  29. Steep switching in trimmed-gate tunnel FET

    Hidehiro Asai, Takahiro Mori, Takashi Matsukawa, Junichi Hattori, Kazuhiko Endo, Koichi Fukuda

    AIP Advances 8 (9) 2018/09/01

    DOI: 10.1063/1.5043570  

    eISSN: 2158-3226

  30. Position Control and Gas Source CVD Growth Technologies of 2D MX<inf>2</inf> Materials for Real LSI Applications

    T. Irisawa, N. Okada, W. Mizubayashi, T. Mori, W. H. Chang, K. Koga, A. Ando, K. Endo, S. Sasaki, T. Endo, Y. Miyata

    2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings 331-333 2018/07/26

    DOI: 10.1109/EDTM.2018.8421437  

  31. Simulation study of short-channel effects of tunnel field-effect transistors

    Koichi Fukuda, Hidehiro Asai, Junichi Hattori, Takahiro Mori, Yukinori Morita, Wataru Mizubayashi, Meishoku Masahara, Shinji Migita, Hiroyuki Ota, Kazuhiro Endo, Takashi Matsukawa

    Japanese Journal of Applied Physics 57 (4) 2018/04

    DOI: 10.7567/JJAP.57.04FD04  

    ISSN: 0021-4922

    eISSN: 1347-4065

  32. Enhancement of capacitance benefit by drain offset structure in tunnel field-effect transistor circuit speed associated with tunneling probability increase

    Hidehiro Asai, Takahiro Mori, Takashi Matsukawa, Junichi Hattori, Kazuhiko Endo, Koichi Fukuda

    Japanese Journal of Applied Physics 57 (4) 2018/04

    DOI: 10.7567/JJAP.57.04FD13  

    ISSN: 0021-4922

    eISSN: 1347-4065

  33. Short Channel Modeling of Tunnel FET's Peer-reviewed

    K. Fukuda, H. Asai, J. Hattori, T. Mori, Y. Morita, W. Mizubayashi, M. Masahara, S. Migita, H. Ota, K. Endo, T. Matsukawa

    Extended Abstracts of the 2017 International Conference on Solid State Devices and Materials 2017/09/21

    Publisher: The Japan Society of Applied Physics

    DOI: 10.7567/ssdm.2017.ps-3-05  

  34. Enhancement of Capacitance Benefit by Drain Offset Structure in TFET Circuit Speed Associated with Tunneling Probability Increase Peer-reviewed

    H. Asai, T. Mori, T. Matsukawa, J. Hattori, K. Endo, K. Fukuda

    Extended Abstracts of the 2017 International Conference on Solid State Devices and Materials 2017/09/21

    Publisher: The Japan Society of Applied Physics

    DOI: 10.7567/ssdm.2017.ps-3-06  

  35. Tunnel FinFET CMOS inverter with very low short-circuit current for ultralow-power Internet of Things application

    Yukinori Morita, Koichi Fukuda, Yongxun Liu, Takahiro Mori, Wataru Mizubayashi, Shin Ichi O'Uchi, Hiroshi Fuketa, Shintaro Otsuka, Shinji Migita, Meishoku Masahara, Kazuhiko Endo, Hiroyuki Ota, Takashi Matsukawa

    Japanese Journal of Applied Physics 56 (4) 2017/04

    DOI: 10.7567/JJAP.56.04CD19  

    ISSN: 0021-4922

    eISSN: 1347-4065

  36. Bias temperature instability in tunnel field-effect transistors

    Wataru Mizubayashi, Takahiro Mori, Koichi Fukuda, Yuki Ishikawa, Yukinori Morita, Shinji Migita, Hiroyuki Ota, Yongxun Liu, Shinichi O'Uchi, Junichi Tsukada, Hiromi Yamauchi, Takashi Matsukawa, Meishoku Masahara, Kazuhiko Endo

    Japanese Journal of Applied Physics 56 (4) 2017/04

    DOI: 10.7567/JJAP.56.04CA04  

    ISSN: 0021-4922

    eISSN: 1347-4065

  37. On the drain bias dependence of long-channel silicon-on-insulator-based tunnel field-effect transistors

    Koichi Fukuda, Takahiro Mori, Hidehiro Asai, Junichi Hattori, Wataru Mizubayashi, Yukinori Morita, Hiroshi Fuketa, Shinji Migita, Hiroyuki Ota, Meishoku Masahara, Kazuhiko Endo, Takashi Matsukawa

    Japanese Journal of Applied Physics 56 (4) 2017/04

    DOI: 10.7567/JJAP.56.04CD04  

    ISSN: 0021-4922

    eISSN: 1347-4065

  38. Impacts of plasma-induced damage due to UV light irradiation during etching on Ge fin fabrication and device performance of Ge fin field-effect transistors

    Wataru Mizubayashi, Shuichi Noda, Yuki Ishikawa, Takashi Nishi, Akio Kikuchi, Hiroyuki Ota, Ping Hsun Su, Yiming Li, Seiji Samukawa, Kazuhiko Endo

    Applied Physics Express 10 (2) 2017/02

    DOI: 10.7567/APEX.10.026501  

    ISSN: 1882-0778

    eISSN: 1882-0786

  39. On the Drain Bias Dependence of Tunnel FETs Peer-reviewed

    K. Fukuda, T. Mori, H. Asai, J. Hattori, W. Mizubayashi, Y. Morita, H. Fuketa, S. Migita, H. Ota, M. Masahara, K. Endo, T. Matsukawa

    Extended Abstracts of the 2016 International Conference on Solid State Devices and Materials 2016/09/28

    Publisher: The Japan Society of Applied Physics

    DOI: 10.7567/ssdm.2016.a-3-03  

  40. Tunnel FinFET CMOS Inverter with Very Low Short-Circuit Current for Ultra-Low Power IoT Application Peer-reviewed

    Yukinori Morita, Koichi Fukuda, Yongxun Liu, Takahiro Mori, Wataru Mizubayashi, Shin-ichi O'uchi, Hiroshi Fuketa, Shintaro Otsuka, Shinji Migita, Meishoku Masahara, Kazuhiko Endo, Hiroyuki Ota, Takashi Matsukawa

    International Conference on Solid State Devices and Materials (SSDM) 49-50 2016/09

    DOI: 10.7567/SSDM.2016.A-6-03  

  41. Introduction of SiGe/Si heterojunction into novel multilayer tunnel FinFET

    Yukinori Morita, Koichi Fukuda, Takahiro Mori, Wataru Mizubayashi, Shinji Migita, Kazuhiko Endo, Shin Ichi O'Uchi, Yongxun Liu, Meishoku Masahara, Takashi Matsukawa, Hiroyuki Ota

    Japanese Journal of Applied Physics 55 (4) 2016/04

    DOI: 10.7567/JJAP.55.04EB06  

    ISSN: 0021-4922

    eISSN: 1347-4065

  42. Silicon nanodisk array with afinfield-effect transistor for time-domain weighted sum calculation toward massively parallel spiking neural networks

    Takashi Tohara, Haichao Liang, Hirofumi Tanaka, Makoto Igarashi, Seiji Samukawa, Kazuhiko Endo, Yasuo Takahashi, Takashi Morie

    Applied Physics Express 9 (3) 2016/03

    DOI: 10.7567/APEX.9.034201  

    ISSN: 1882-0778

    eISSN: 1882-0786

  43. Floating gate type SOI-FinFET flash memories with different channel shapes and interpoly dielectric materials

    Y. X. Liu, T. Nabatame, T. Matsukawa, K. Endo, S. O'Uchi, W. Mizubayashi, Y. Morita, S. Migita, H. Ota, T. Chikyow, M. Masahara

    ECS Transactions 72 (2) 11-24 2016

    DOI: 10.1149/07202.0011ecst  

    ISSN: 1938-6737

    eISSN: 1938-5862

  44. Highly V<inf>t</inf> tunable and low variability triangular fin-channel MOSFETs on SOTB

    Y. X. Liu, T. Matsukawa, K. Endo, S. O'uchi, J. Tsukada, H. Yamauchi, Y. Ishikawa, W. Mizubayashi, Y. Morita, S. Migita, H. Ota, M. Masahara

    Microelectronic Engineering 147 290-293 2015/11/01

    DOI: 10.1016/j.mee.2015.04.075  

    ISSN: 0167-9317

  45. Impact of fin length on threshold voltage modulation by back bias for Independent double-gate tunnel fin field-effect transistors

    W. Mizubayashi, K. Fukuda, T. Mori, K. Endo, Y. X. Liu, T. Matsukawa, S. O'Uchi, Y. Ishikawa, S. Migita, Y. Morita, A. Tanabe, J. Tsukada, H. Yamauchi, M. Masahara, H. Ota

    Solid-State Electronics 111 62-66 2015/09/01

    DOI: 10.1016/j.sse.2015.04.011  

    ISSN: 0038-1101

  46. Improvement of epitaxial channel quality on heavily arsenic- and boron-doped Si surfaces and impact on performance of tunnel field-effect transistors

    Yukinori Morita, Takahiro Mori, Shinji Migita, Wataru Mizubayashi, Koichi Fukuda, Takashi Matsukawa, Kazuhiko Endo, Shin Ichi O'uchi, Yongxun Liu, Meishoku Masahara, Hiroyuki Ota

    Solid-State Electronics 113 173-178 2015/07/20

    DOI: 10.1016/j.sse.2015.05.031  

    ISSN: 0038-1101

  47. Channel shape and interpoly dielectric material effects on electrical characteristics of floating-gate-type three-dimensional fin channel flash memories

    Yongxun Liu, Toshihide Nabatame, Num Nguyen, Takashi Matsukawa, Kazuhiko Endo, Shinichi O'uchi, Junichi Tsukada, Hiromi Yamauchi, Yuki Ishikawa, Wataru Mizubayashi, Yukinori Morita, Shinji Migita, Hiroyuki Ota, Toyohiro Chikyow, Meishoku Masahara

    Japanese Journal of Applied Physics 54 (4) 2015/04

    DOI: 10.7567/JJAP.54.04DD04  

    ISSN: 0021-4922

    eISSN: 1347-4065

  48. Heated ion implantation for high-performance and highly reliable silicon-on-insulator complementary metal-oxide-silicon fin field-effect transistors

    Wataru Mizubayashi, Hiroshi Onoda, Yoshiki Nakashima, Yuki Ishikawa, Takashi Matsukawa, Kazuhiko Endo, Yongxun Liu, Shinichi O'uchi, Junichi Tsukada, Hiromi Yamauchi, Shinji Migita, Yukinori Morita, Hiroyuki Ota, Meishoku Masahara

    Japanese Journal of Applied Physics 54 (4) 2015/04

    DOI: 10.7567/JJAP.54.04DA06  

    ISSN: 0021-4922

    eISSN: 1347-4065

  49. Impact of granular work function variation in a gate electrode on low-frequency noise for fin field-effect transistors

    Takashi Matsukawa, Koichi Fukuda, Yongxun Liu, Junichi Tsukada, Hiromi Yamauchi, Kazuhiko Endo, Yuki Ishikawa, Shin Ichi O'uchi, Shinji Migita, Yukinori Morita, Wataru Mizubayashi, Hiroyuki Ota, Meishoku Masahara

    Applied Physics Express 8 (4) 2015/04

    DOI: 10.7567/APEX.8.044201  

    ISSN: 1882-0778

    eISSN: 1882-0786

  50. 0.8-V Rail-to-Rail Operational Amplifier with Near-Vt Gain-Boosting Stage Fabricated in FinFET Technology for IoT Sensor Nodes

    O'Uchi, S., Liu, Y. X., Nakagawa, T., Mizubayashi, W., Migita, S., Morita, N., Ota, H., Ishikawa, Y., Tsukada, J., Koike, H., Masahara, M., Endo, K., Matsukawa, T., Ieee,

    2015

  51. 0.8-V Rail-to-Rail Operational Amplifier with Near-Vt Gain-Boosting Stage Fabricated in FinFET Technology for IoT Sensor Nodes

    O'Uchi, S., Liu, Y. X., Nakagawa, T., Mizubayashi, W., Migita, S., Morita, N., Ota, H., Ishikawa, Y., Tsukada, J., Koike, H., Masahara, M., Endo, K., Matsukawa, T., Ieee,

    2015

  52. Variability in FinFET SRAM cells

    K. Endo, S. O'Uchi, T. Matsukawa, Y. Liu, M. Masahara

    ECS Transactions 69 (5) 141-147 2015

    DOI: 10.1149/06905.0141ecst  

    ISSN: 1938-6737

    eISSN: 1938-5862

  53. Performance evaluation of parallel electric field tunnel field-effect transistor by a distributed-element circuit model

    Yukinori Morita, Takahiro Mori, Shinji Migita, Wataru Mizubayashi, Akihito Tanabe, Koichi Fukuda, Takashi Matsukawa, Kazuhiko Endo, Shin Ichi O'Uchi, Yongxun Liu, Meishoku Masahara, Hiroyuki Ota

    Solid-State Electronics 102 82-86 2014/12

    DOI: 10.1016/j.sse.2014.06.007  

    ISSN: 0038-1101

  54. Performance enhancement of tunnel field-effect transistors by synthetic electric field effect

    Yukinori Morita, Takahiro Mori, Shinji Migita, Wataru Mizubayashi, Akihito Tanabe, Koichi Fukuda, Takashi Matsukawa, Kazuhiko Endo, Shinichi O'Uchi, Yong Xun Liu, Meishoku Masahara, Hiroyuki Ota

    IEEE Electron Device Letters 35 (7) 792-794 2014/07

    DOI: 10.1109/LED.2014.2323337  

    ISSN: 0741-3106

  55. Comparative study of charge trapping type SOI-FinFET flash memories with different blocking layer materials

    Yongxun Liu, Toshihide Nabatame, Takashi Matsukawa, Kazuhiko Endo, Shinichi O'uchi, Junichi Tsukada, Hiromi Yamauchi, Yuki Ishikawa, Wataru Mizubayashi, Yukinori Morita, Shinji Migita, Hiroyuki Ota, Toyohiro Chikyow, Meishoku Masahara

    Journal of Low Power Electronics and Applications 4 (2) 153-167 2014/06/20

    DOI: 10.3390/jlpea4020153  

    eISSN: 2079-9268

  56. Analysis of threshold voltage flexibility in ultrathin-BOX SOI FinFETs

    Kazuhiko Endo, Shinji Migita, Yuki Ishikawa, Takashi Matsukawa, Shin Ichi O'uchi, Junji Tsukada, Wataru Mizubayashi, Yukinori Morita, Hiroyuki Ota, Hitomi Yamauchi, Meishoku Masahara

    Journal of Low Power Electronics and Applications 4 (2) 110-118 2014/05/23

    DOI: 10.3390/jlpea4020110  

    eISSN: 2079-9268

  57. Influence of work function variation of metal gates on fluctuation of sub-threshold drain current for fin field-effect transistors with undoped channels

    Takashi Matsukawa, Yongxun Liu, Kazuhiko Endo, Junichi Tsukada, Hiromi Yamauchi, Yuki Ishikawa, Shinichi O'uchi, Wataru Mizubayashi, Hiroyuki Ota, Shinji Migita, Yukinori Morita, Meishoku Masahara

    Japanese Journal of Applied Physics 53 (4 SPEC. ISSUE) 2014/04

    DOI: 10.7567/JJAP.53.04EC11  

    ISSN: 0021-4922

    eISSN: 1347-4065

  58. Experimental study of three-dimensional fin-channel charge trapping flash memories with titanium nitride and polycrystalline silicon gates

    Yongxun Liu, Takashi Matsukawa, Kazuhiko Endo, Shinichi O'uchi, Junichi Tsukada, Hiromi Yamauchi, Yuki Ishikawa, Wataru Mizubayashi, Yukinori Morita, Shinji Migita, Hiroyuki Ota, Meishoku Masahara

    Japanese Journal of Applied Physics 53 (4 SPEC. ISSUE) 2014/04

    DOI: 10.7567/JJAP.53.04ED16  

    ISSN: 0021-4922

    eISSN: 1347-4065

  59. Fabrication and Characterization of 3D Fin-Channel MANOS Type Flash Memory Peer-reviewed

    Y. X. Liu, T. Nabatame, T. Matsukawa, K. Endo, S. O'uchi, J. Tsukada, H. Yamauchi, Y. Ishikawa, W. Mizubayashi, Y. Morita, S. Migita, H. Ota, T. Chikyow, M. Masahara

    2014 IEEE SILICON NANOELECTRONICS WORKSHOP (SNW) 2014

    DOI: 10.1109/SNW.2014.7348559  

    ISSN: 2161-4636

  60. Experimental Study of Charge Trapping Type FinFET Flash Memory Peer-reviewed

    Yongxun Liu, Toshihide Nabatame, Takashi Matsukawa, Kazuhiko Endo, Sinichi O'uchi, Junichi Tsukada, Hiromi Yamauchi, Yuki Ishikawa, Wataru Mizubayashi, Yukinori Morita, Shinji Migita, Hiroyuki Ota, Toyohiro Chikyow, Meishoku Masahara

    2014 IEEE INTERNATIONAL NANOELECTRONICS CONFERENCE (INEC) 2014

    DOI: 10.1109/INEC.2014.7460429  

    ISSN: 2159-3523

  61. Accurate Prediction of PBTI Lifetime for N-type Fin-Channel Tunnel FETs Peer-reviewed

    W. Mizubayashi, T. Mori, K. Fukuda, Y. X. Liu, T. Matsukawa, Y. Ishikawa, K. Endo, S. O'uchi, J. Tsukada, H. Yamauchi, Y. Morita, S. Migita, H. Ota, M. Masahara

    2014 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) 2014

  62. Scaling Breakthrough for Analog/Digital Circuits by Suppressing Variability and Low-Frequency Noise for FinFETs by Amorphous Metal Gate Technology

    Matsukawa, T., Fukuda, K., Liu, Y. X., Tsukada, J., Yamauchi, H., Ishikawa, Y., Endo, K., O'Uchi, S., Migita, S., Mizubayashi, W., Morita, Y., Ota, H., Masahara, M., Ieee,

    2014

  63. Lowest Variability SOI FinFETs Having Multiple V-t by Back-Biasing

    Matsukawa, T., Fukuda, K., Liu, Y. X., Endo, K., Tsukada, J., Yamauchi, H., Ishikawa, Y., O'Uchi, S., Mizubayashi, W., Migita, S., Orita, Y. M., Ota, H., Masahara, M., Ieee,

    2014

  64. Scaling Breakthrough for Analog/Digital Circuits by Suppressing Variability and Low-Frequency Noise for FinFETs by Amorphous Metal Gate Technology

    Matsukawa, T., Fukuda, K., Liu, Y. X., Tsukada, J., Yamauchi, H., Ishikawa, Y., Endo, K., O'Uchi, S., Migita, S., Mizubayashi, W., Morita, Y., Ota, H., Masahara, M., Ieee,

    2014

  65. Lowest Variability SOI FinFETs Having Multiple V-t by Back-Biasing

    Matsukawa, T., Fukuda, K., Liu, Y. X., Endo, K., Tsukada, J., Yamauchi, H., Ishikawa, Y., O'Uchi, S., Mizubayashi, W., Migita, S., Orita, Y. M., Ota, H., Masahara, M., Ieee,

    2014

  66. Experimental Realization of Complementary p- and n- Tunnel FinFETs with Subthreshold Slopes of less than 60 mV/decade and Very Low (pA/mu m) Off-Current on a Si CMOS Platform

    Morita, Y., Mori, T., Fukuda, K., Mizubayashi, W., Migita, S., Matsukawa, T., Endo, K., O'Uchi, S., Liu, Y., Masahara, M., Ota, H., Ieee,

    2014

  67. Experimental Realization of Complementary p- and n- Tunnel FinFETs with Subthreshold Slopes of less than 60 mV/decade and Very Low (pA/mu m) Off-Current on a Si CMOS Platform

    Morita, Y., Mori, T., Fukuda, K., Mizubayashi, W., Migita, S., Matsukawa, T., Endo, K., O'Uchi, S., Liu, Y., Masahara, M., Ota, H., Ieee,

    2014

  68. Charge trapping type SOI-FinFET flash memory

    Y. X. Liu, T. Nabatame, T. Matsukawa, K. Endo, S. O'uchi, J. Tsukada, H. Yamauchi, Y. Ishikawa, W. Mizubayashi, Y. Morita, S. Migita, H. Ota, T. Chikyow, M. Masahara

    ECS Transactions 61 (2) 263-280 2014

    DOI: 10.1149/06102.0263ecst  

    ISSN: 1938-5862

    eISSN: 1938-6737

  69. Atomic layer deposition of SiO<inf>2</inf> for the performance enhancement of fin field effect transistors

    Kazuhiko Endo, Yuki Ishikawa, Takashi Matsukawa, Yongxun Liu, Shin Ichi O'Uchi, Kunihiro Sakamoto, Junichi Tsukada, Hiromi Yamauchi, Meishoku Masahara

    Japanese Journal of Applied Physics 52 (11 PART 1) 2013/11

    DOI: 10.7567/JJAP.52.116503  

    ISSN: 0021-4922

    eISSN: 1347-4065

  70. Gate structure dependence of variability in polycrystalline silicon fin-channel flash memories

    Yongxun Liu, Takahiro Kamei, Takashi Matsukawa, Kazuhiko Endo, Shinichi O'Uchi, Junichi Tsukada, Hiromi Yamauchi, Yuki Ishikawa, Tetsuro Hayashida, Kunihiro Sakamoto, Atsushi Ogura, Meishoku Masahara

    Japanese Journal of Applied Physics 52 (6 PART 2) 2013/06

    DOI: 10.7567/JJAP.52.06GE01  

    ISSN: 0021-4922

    eISSN: 1347-4065

  71. Independent-double-gate FinFET SRAM technology

    Kazuhiko Endo, Shin Ichi Ouchi, Takashi Matsukawa, Yongxun Liu, Meishoku Masahara

    IEICE Transactions on Electronics E96-C (4) 413-423 2013/04

    DOI: 10.1587/transele.E96.C.413  

    ISSN: 0916-8524

    eISSN: 1745-1353

  72. 1=f noise characteristics of fin-type field-effect transistors in saturation region

    Hideo Sakai, Shin Ichi O'uchi, Kazuhiko Endo, Takashi Matsukawa, Yongxun Liu, Yuki Ishikawa, Junichi Tsukada, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike, Meishoku Masahara, Hiroki Ishikuro

    Japanese Journal of Applied Physics 52 (4 PART 2) 2013/04

    DOI: 10.7567/JJAP.52.04CC23  

    ISSN: 0021-4922

    eISSN: 1347-4065

  73. Suppression of threshold voltage variability of double-gate fin field-effect transistors using amorphous metal gate with uniform work function

    T. Matsukawa, Y. X. Liu, W. Mizubayashi, J. Tsukada, H. Yamauchi, K. Endo, Y. Ishikawa, S. Ouchi, H. Ota, S. Migita, Y. Morita, M. Masahara

    Applied Physics Letters 102 (16) 2013/04

    DOI: 10.1063/1.4803040  

    ISSN: 0003-6951

  74. Heated Ion Implantation Technology for Highly Reliable Metal-gate/High-k CMOS SOI FinFETs

    Mizubayashi, W., Onoda, H., Nakashima, Y., Ishikawa, Y., Matsukawa, T., Endo, K., Liu, Y. X., O'Uchi, S., Tsukada, J., Yamauchi, H., Migita, S., Morita, Y., Ota, H., Masahara, M., Ieee,

    2013

  75. Heated Ion Implantation Technology for Highly Reliable Metal-gate/High-k CMOS SOI FinFETs

    Mizubayashi, W., Onoda, H., Nakashima, Y., Ishikawa, Y., Matsukawa, T., Endo, K., Liu, Y. X., O'Uchi, S., Tsukada, J., Yamauchi, H., Migita, S., Morita, Y., Ota, H., Masahara, M., Ieee,

    2013

  76. Analytical thermal model for self-heating in advanced FinFET devices with implications for design and reliability

    Chuan Xu, Seshadri K. Kolluri, Kazhuhiko Endo, Kaustav Banerjee

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 32 (7) 1045-1058 2013

    DOI: 10.1109/TCAD.2013.2248194  

    ISSN: 0278-0070

  77. Independent-double-gate FinFET SRAM technology

    K. Endo, S. O'Uchi, T. Matsukawa, Y. Liu, M. Masahara

    ECS Transactions 50 (4) 193-199 2013

    DOI: 10.1149/05004.0193ecst  

    ISSN: 1938-5862

    eISSN: 1938-6737

  78. Enhancement of FinFET performance using 25-nm-thin sidewall spacer grown by atomic layer deposition

    Kazuhiko Endo, Yuki Ishikawa, Takashi Matsukawa, Yongxum Liu, Shin Ichi O'Uchi, Kunihiro Sakamoto, Junichi Tsukada, Hiromi Yamauchi, Meishoku Masahara

    Solid-State Electronics 74 13-18 2012/08

    DOI: 10.1016/j.sse.2012.04.005  

    ISSN: 0038-1101

  79. Experimental study of floating-gate-type metal-oxide-semiconductor capacitors with nanosize triangular cross-sectional tunnel areas for low operating voltage flash memory application

    Yongxun Liu, Ruofeng Guo, Takahiro Kamei, Takashi Matsukawa, Kazuhiko Endo, Shinichi O'Uchi, Junichi Tsukada, Hiromi Yamauchi, Yuki Ishikawa, Tetsuro Hayashida, Kunihiro Sakamoto, Atsushi Ogura, Meishoku Masahara

    Japanese Journal of Applied Physics 51 (6 PART 2) 2012/06

    DOI: 10.1143/JJAP.51.06FF01  

    ISSN: 0021-4922

    eISSN: 1347-4065

  80. Fabrication and characterization of NOR-type tri-gate flash memory with improved inter-poly dielectric layer by rapid thermal oxidation

    Takahiro Kamei, Yongxun Liu, Takashi Matsukawa, Kazuhiko Endo, Shinichi O'Uchi, Junichi Tsukada, Hiromi Yamauchi, Yuki Ishikawa, Tetsuro Hayashida, Kunihiro Sakamoto, Atsushi Ogura, Meishoku Masahara

    Japanese Journal of Applied Physics 51 (6 PART 2) 2012/06

    DOI: 10.1143/JJAP.51.06FE19  

    ISSN: 0021-4922

    eISSN: 1347-4065

  81. A correlative analysis between characteristics of FinFETs and SRAM performance

    Kazuhiko Endo, Shinichi O'Uchi, Yuki Ishikawa, Yongxun Liu, Takashi Matsukawa, Kunihiro Sakamoto, Junichi Tsukada, Hiromi Yamauchi, Meishoku Masahara

    IEEE Transactions on Electron Devices 59 (5) 1345-1352 2012/05

    DOI: 10.1109/TED.2012.2188633  

    ISSN: 0018-9383

  82. High-frequency precise characterization of intrinsic FinFET channel

    Hideo Sakai, Shinichi O'uchi, Takashi Matsukawa, Kazuhiko Endo, Yongxun Liu, Junichi Tsukada, Yuki Ishikawa, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike, Kunihiro Sakamoto, Meishoku Masahara, Hiroki Ishikuro

    IEICE Transactions on Electronics E95-C (4) 752-760 2012/04

    DOI: 10.1587/transele.E95.C.752  

    ISSN: 0916-8524

    eISSN: 1745-1353

  83. A 0.7-V opamp in scaled low-standby-power FinFET technology

    Shin Ichi O'uchi, Kazuhiko Endo, Takashi Matsukawa, Yongxun Liu, Tadashi Nakagawa, Yuki Ishikawa, Junichi Tsukada, Hiromi Yamauchi, Toshihiro Sekigawa, Hanpei Koike, Kunihiro Sakamoto, Meishoku Masahara

    IEICE Transactions on Electronics E95-C (4) 686-695 2012/04

    DOI: 10.1587/transele.E95.C.686  

    ISSN: 0916-8524

    eISSN: 1745-1353

  84. Experimental comparisons between tetrakis(dimethylamino)titanium precursor-based atomic-layer-deposited and physical-vapor-deposited titanium-nitride gate for high-performance fin-type metal-oxide-semiconductor field-effect transistors

    Tetsuro Hayashida, Kazuhiko Endo, Yongxun Liu, Shin Ichi O'Uchi, Takashi Matsukawa, Yusuke Wataru Mizubayashi, Shinji Migita, Yukinori Morita, Hiroyuki Ota, Hiroki Hashiguchi, Daisuke Kosemura, Takahiro Kamei, Junichi Tsukada, Yuki Ishikawa, Hiromi Yamauchi, Atsushi Ogura, Meishoku Masahara

    Japanese Journal of Applied Physics 51 (4 PART 2) 2012/04

    DOI: 10.1143/JJAP.51.04DA05  

    ISSN: 0021-4922

    eISSN: 1347-4065

  85. Fabrication of floating-gate-type fin-channel double-and tri-gate flash memories and comparative study of their electrical characteristics

    Yongxun Liu, Takahiro Kamei, Takashi Matsukawa, Kazuhiko Endo, Shinichi O'Uchi, Junichi Tsukada, Hiromi Yamauchi, Yuki Ishikawa, Tetsuro Hayashida, Kunihiro Sakamoto, Atsushi Ogura, Meishoku Masahara

    Japanese Journal of Applied Physics 51 (4 PART 2) 2012/04

    DOI: 10.1143/JJAP.51.04DD03  

    ISSN: 0021-4922

    eISSN: 1347-4065

  86. Variability origins of parasitic resistance in finFETs with silicided source/drain

    Takashi Matsukawa, Yongxun Liu, Kazuhiko Endo, Junichi Tsukada, Yuki Ishikawa, Hiromi Yamauchi, Shinichi O'Uchi, Kunihiro Sakamoto, Meishoku Masahara

    IEEE Electron Device Letters 33 (4) 474-476 2012/04

    DOI: 10.1109/LED.2012.2182755  

    ISSN: 0741-3106

  87. Demonstration of split-gate type trigate flash memory with highly suppressed over-erase

    Takahiro Kamei, Yongxun Liu, Takashi Matsukawa, Kazuhiko Endo, Shinichi O'Uchi, Junichi Tsukada, Hiromi Yamauchi, Yuki Ishikawa, Tetsuro Hayashida, Kunihiro Sakamoto, Atsushi Ogura, Meishoku Masahara

    IEEE Electron Device Letters 33 (3) 345-347 2012/03

    DOI: 10.1109/LED.2011.2181322  

    ISSN: 0741-3106

  88. Variability analysis of scaled crystal channel and poly-Si channel FinFETs

    Yongxun Liu, Takahiro Kamei, Takashi Matsukawa, Kazuhiko Endo, Shinichi O'Uchi, Junichi Tsukada, Hiromi Yamauchi, Yuki Ishikawa, Tetsuro Hayashida, Kunihiro Sakamoto, Atsushi Ogura, Meishoku Masahara

    IEEE Transactions on Electron Devices 59 (3) 573-581 2012/03

    DOI: 10.1109/TED.2011.2178850  

    ISSN: 0018-9383

  89. Fin-height effect on poly-Si/PVD-TiN stacked-gate FinFET performance

    Tetsuro Hayashida, Kazuhiko Endo, Yongxun Liu, Shin Ichi O'Uchi, Takashi Matsukawa, Wataru Mizubayashi, Shinji Migita, Yukinori Morita, Hiroyuki Ota, Hiroki Hashiguchi, Daisuke Kosemura, Takahiro Kamei, Junichi Tsukada, Yuki Ishikawa, Hiromi Yamauchi, Atsushi Ogura, Meishoku Masahara

    IEEE Transactions on Electron Devices 59 (3) 647-653 2012/03

    DOI: 10.1109/TED.2011.2181385  

    ISSN: 0018-9383

  90. Suppressing V-t and G(m) Variability of FinFETs Using Amorphous Metal Gates for 14 nm and Beyond

    Matsukawa, T., Liu, Y. X., Mizubayashi, W., Tsukada, J., Yamauchi, H., Endo, K., Ishikawa, Y., O'Uchi, S., Ota, H., Migita, S., Morita, Y., Masahara, M., Ieee,

    2012

  91. Suppressing V-t and G(m) Variability of FinFETs Using Amorphous Metal Gates for 14 nm and Beyond

    Matsukawa, T., Liu, Y. X., Mizubayashi, W., Tsukada, J., Yamauchi, H., Endo, K., Ishikawa, Y., O'Uchi, S., Ota, H., Migita, S., Morita, Y., Masahara, M., Ieee,

    2012

  92. On-current variability sources of FinFETs: Analysis and perspective for 14nm-Lg technology

    T. Matsukawa, Y. X. Liu, K. Endo, S. O'Uchi, M. Masahara

    ECS Transactions 45 (6) 231-242 2012

    DOI: 10.1149/1.3700958  

    ISSN: 1938-5862

    eISSN: 1938-6737

  93. FinFET flash memory technology

    Y. X. Liu, T. Kamei, T. Matsukawa, K. Endo, S. O'uchi, J. Tsukada, H. Yamauchi, Y. Ishikawa, T. Hayashida, K. Sakamoto, A. Ogura, M. Masahara

    ECS Transactions 45 (3) 289-310 2012

    DOI: 10.1149/1.3700894  

    ISSN: 1938-5862

    eISSN: 1938-6737

  94. Decomposition of on-current variability of nMOS FinFETs for prediction beyond 20 nm

    Takashi Matsukawa, Yongxun Liu, Shin Ichi O'Uchi, Kazuhiko Endo, Junichi Tsukada, Hiromi Yamauchi, Yuki Ishikawa, Hiroyuki Ota, Shinji Migita, Yukinori Morita, Wataru Mizubayashi, Kunihiro Sakamoto, Meishoku Masahara

    IEEE Transactions on Electron Devices 59 (8) 2003-2010 2012

    DOI: 10.1109/TED.2012.2196766  

    ISSN: 0018-9383

  95. Static noise margin enhancement by flex-pass-gate SRAM

    Shin Ichi O'Uchi, Meishoku Masahara, Kunihiro Sakamoto, Kazuhiko Endo, Yungxun Liu, Takashi Matsukawa, Toshihiro Sekigawa, Hanpei Koike, Eiichi Suzuki

    Electronics and Communications in Japan 94 (8) 57-64 2011/08

    DOI: 10.1002/ecj.10217  

    ISSN: 1942-9533

    eISSN: 1942-9541

  96. Grain-orientation induced quantum confinement variation in FinFETs and multi-gate ultra-thin body CMOS devices and implications for digital design

    Seid Hadi Rasouli, Kazuhiko Endo, Jone F. Chen, Navab Singh, Kaustav Banerjee

    IEEE Transactions on Electron Devices 58 (8) 2282-2292 2011/08

    DOI: 10.1109/TED.2011.2151196  

    ISSN: 0018-9383

  97. Low activation energy, high-quality oxidation of Si and Ge using neutral beam

    Akira Wada, Kazuhiko Endo, Meishoku Masahara, Chi Hsien Huang, Seiji Samukawa

    Applied Physics Letters 98 (20) 2011/05/16

    DOI: 10.1063/1.3592576  

    ISSN: 0003-6951

    eISSN: 1077-3118

  98. Experimental study of physical-vapor-deposited titanium nitride gate with an n+-polycrystalline silicon capping layer and its application to 20nm fin-type double-gate metal-oxide-semiconductor field-effect transistors

    Takahiro Kamei, Yongxun Liu, Kazuhiko Endo, Shinichi O'uchi, Junichi Tsukada, Hiromi Yamauchi, Yuki Ishikawa, Tetsuro Hayashida, Takashi Matsukawa, Kunihiro Sakamoto, Atsushi Ogura, Meishoku Masahara

    Japanese Journal of Applied Physics 50 (4 PART 2) 2011/04

    DOI: 10.1143/JJAP.50.04DC14  

    ISSN: 0021-4922

    eISSN: 1347-4065

  99. HiSIM-DG for Extracting Statistical Variations of Measured I-V Characteristics

    Shintaku, Y., Ichimiya, H., Miura-Mattausch, M., Endo, K., O'Uchi, S., Masahara, M.

    2011

  100. HiSIM-DG for Extracting Statistical Variations of Measured I-V Characteristics

    Shintaku, Y., Ichimiya, H., Miura-Mattausch, M., Endo, K., O'Uchi, S., Masahara, M.

    2011

  101. Rigorous design of 22-nm node 4-terminal SOI FinFETs for reliable low standby power operation with semi-empirical parameters

    Seongjae Cho, Shinichi O'uchi, Kazuhiko Endo, Sang Wan Kim, Younghwan Son, In Man Kang, Meishoku Masahara, James S. Harris, Byung Gook Park

    Journal of Semiconductor Technology and Science 10 (4) 265-275 2010/12

    DOI: 10.5573/JSTS.2010.10.4.265  

    ISSN: 1598-1657

  102. Design optimization of FinFET domino logic considering the width quantization property

    Seid Hadi Rasouli, Hamed F. Dadgour, Kazuhiko Endo, Hanpei Koike, Kaustav Banerjee

    IEEE Transactions on Electron Devices 57 (11) 2934-2943 2010/11

    DOI: 10.1109/TED.2010.2076374  

    ISSN: 0018-9383

  103. Design of SOI FinFET on 32 nm technology node for low standby power (LSTP) operation considering gate-induced drain leakage (GIDL)

    Seongjae Cho, Jung Hoon Lee, Shinichi O'Uchi, Kazuhiko Endo, Meishoku Masahara, Byung Gook Park

    Solid-State Electronics 54 (10) 1060-1065 2010/10

    DOI: 10.1016/j.sse.2010.05.013  

    ISSN: 0038-1101

  104. Grain-orientation induced work function variation in nanoscale metal-gate transistors - Part I: Modeling, analysis, and experimental validation

    Hamed F. Dadgour, Kazuhiko Endo, Vivek K. De, Kaustav Banerjee

    IEEE Transactions on Electron Devices 57 (10) 2504-2514 2010/10

    DOI: 10.1109/TED.2010.2063191  

    ISSN: 0018-9383

  105. Grain-orientation induced work function variation in nanoscale metal-gate transistors - Part II: Implications for process, device, and circuit design

    Hamed F. Dadgour, Kazuhiko Endo, Vivek K. De, Kaustav Banerjee

    IEEE Transactions on Electron Devices 57 (10) 2515-2525 2010/10

    DOI: 10.1109/TED.2010.2063270  

    ISSN: 0018-9383

  106. Variability analysis of TiN FinFET SRAM cells and its compensation by independent-DG FinFETs

    Kazuhiko Endo, Shin Ichi O'Uchi, Yuki Ishikawa, Yongxun Liu, Takashi Matsukawa, Kunihiro Sakamoto, Junichi Tsukada, Hiromi Yamauchi, Meishoku Masahara

    IEEE Electron Device Letters 31 (10) 1095-1097 2010/10

    DOI: 10.1109/LED.2010.2062483  

    ISSN: 0741-3106

  107. Fabrication of four-terminal fin field-effect transistors with asymmetric gate-oxide thickness using an anisotropic oxidation process with a neutral beam

    Akira Wada, Kazuhiko Endo, Meishoku Masahara, Chi Hsien Huang, Seiji Samukawa

    Applied Physics Express 3 (9) 2010/09

    DOI: 10.1143/APEX.3.096502  

    ISSN: 1882-0778

    eISSN: 1882-0786

  108. Variability analysis of TiN metal-gate FinFETs

    Kazuhiko Endo, Shin Ichi O'Uchi, Yuki Ishikawa, Yongxun Liu, Takashi Matsukawa, Kunihiro Sakamoto, Junichi Tsukada, Hiromi Yamauchi, Meishoku Masahara

    IEEE Electron Device Letters 31 (6) 546-548 2010/06

    DOI: 10.1109/LED.2010.2047091  

    ISSN: 0741-3106

  109. Nanoscale wet etching of physical-vapor-deposited titanium nitride and its application to sub-30-nm-gate-length fin-type double-gate metal-oxide- semiconductor field-effect transistor fabrication

    Yongxun Liu, Takahiro Kamei, Kazuhiko Endo, Shinichi O'uchi, Junichi Tsukada, Hiromi Yamauchi, Tetsuro Hayashida, Yuki Ishikawa, Takashi Matsukawa, Kunihiro Sakamoto, Atsushi Ogura, Meishoku Masahara

    Japanese Journal of Applied Physics 49 (6 PART 2) 2010/06

    DOI: 10.1143/JJAP.49.06GH18  

    ISSN: 0021-4922

    eISSN: 1347-4065

  110. High-performance three-terminal fin field-effect transistors fabricated by a combination of damage-free neutral-beam etching and neutral-beam oxidation

    Akira Wada, Keisuke Sano, Masahiro Yonemoto, Kazuhiko Endo, Takashi Matsukawa, Meishoku Masahara, Satoshi Yamasaki, Seiji Samukawa

    Japanese Journal of Applied Physics 49 (4 PART 2) 2010/04

    DOI: 10.1143/JJAP.49.04DC17  

    ISSN: 0021-4922

    eISSN: 1347-4065

  111. Investigation of low-energy tilted ion implantation for fin-type double-gate metal-oxide-semiconductor field-effect transistor extension doping

    Yongxun Liu, Takashi Matsukawa, Kazuhiko Endo, Shinich O'uchi, Kunihiro Sakamoto, Junichi Tsukada, Yuki Ishikawa, Hiromi Yamauchi, Meishoku Masahara

    Japanese Journal of Applied Physics 49 (4 PART 2) 2010/04

    DOI: 10.1143/JJAP.49.04DC18  

    ISSN: 0021-4922

    eISSN: 1347-4065

  112. Investigation of thermal stability of TiN film formed by atomic layer deposition using tetrakis(dimethylamino)titanium precursor for metal-gate metal-oxide-semiconductor field-effect transistor

    Tetsuro Hayashida, Kazuhiko Endo, Yongxun Liu, Takahiro Kamei, Takashi Matsukawa, Shin Ichi O'uchi, Kunihiro Sakamoto, Junichi Tsukada, Yuki Ishikawa, Hiromi Yamauchi, Atsushi Ogura, Meishoku Masahara

    Japanese Journal of Applied Physics 49 (4 PART 2) 2010/04

    DOI: 10.1143/JJAP.49.04DA16  

    ISSN: 0021-4922

    eISSN: 1347-4065

  113. Minimization of gate-induced drain leakage by controlling gate underlap length for low-standby-power operation of 20-nm-level four-terminal silicon-on-insulator fin-shaped field effect transistor

    Seongjae Cho, Shinichi O'uchi, Kazuhiko Endo, Takashi Matsukawa, Kunihiro Sakamoto, Yongxun Liu, Byung Gook Park, Meishoku Masahara

    Japanese Journal of Applied Physics 49 (2 Part 1) 2010/02

    DOI: 10.1143/JJAP.49.024203  

    ISSN: 0021-4922

    eISSN: 1347-4065

  114. On the Gate-Stack Origin Threshold Voltage Variability in Scaled FinFETs and Multi-FinFETs

    Liu, Y. X., Endo, K., O'Uchi, S., Kamei, T., Tsukada, J., Yamauchi, H., Ishikawa, Y., Hayashida, T., Sakamoto, K., Matsukawa, T., Ogura, A., Masahara, M., Ieee,

    2010

    DOI: 10.1109/vlsit.2010.5556187  

  115. Advanced FinFET technologies: Extension doping, V<inf>th</inf> controllable CMOS inverters and SRAM

    Y. X. Liu, K. Endo, S. O'uchi, T. Matsukawa, K. Sakamoto, M. Masahara

    ECS Transactions 28 (2) 385-401 2010

    DOI: 10.1149/1.3372593  

    ISSN: 1938-5862

    eISSN: 1938-6737

  116. Dual metal gate FinFET integration by Ta/Mo diffusion technology for V<inf>t</inf> reduction and multi-V<inf>t</inf> CMOS application

    Takashi Matsukawa, Kazuhiko Endo, Yongxun Liu, Shinichi O'uchi, Yuki Ishikawa, Hiromi Yamauchi, Junichi Tsukada, Kenichi Ishii, Kunihiro Sakamoto, Eiichi Suzuki, Meishoku Masahara

    Solid-State Electronics 53 (7) 701-705 2009/07

    DOI: 10.1016/j.sse.2009.02.013  

    ISSN: 0038-1101

  117. Vertical ultrathin-channel multi-gate MOSFETs (MuGFETs): Technological challenges and future developments

    Meishoku Masahara, Yongxun Liu, Kazuhiko Endo, Takashi Matsukawa, Eiichi Suzuki

    IEEJ Transactions on Electrical and Electronic Engineering 4 (3) 386-391 2009/05

    DOI: 10.1002/tee.20422  

    ISSN: 1931-4973

    eISSN: 1931-4981

  118. Enhancing noise margins of fin-type field effect transistor static random access memory cell by using threshold voltage-controllable flexible-pass-gates

    Kazuhiko Endo, Shin Ichi O'uchi, Yuki Ishikawa, Yongxum Liu, Takashi Matsukawa, Meishoku Masahara, Kunihiro Sakamoto, Junichi Tsukada, Kenichi Ishii, Hiromi Yamauchi, Eiichi Suzuki

    Applied Physics Express 2 (5) 2009/05

    DOI: 10.1143/APEX.2.054502  

    ISSN: 1882-0778

    eISSN: 1882-0786

  119. A comparative study of nitrogen gas flow ratio dependence on the electrical characteristics of sputtered titanium nitride gate bulk planar metal-oxide-semiconductor field-effect transistors and fin-type metal-oxide-semiconductor field-effect transistors

    Tetsuro Hayashida, Yongxun Liu, Takashi Matsukawa, Kazuhiko Endo, Shinich O'Uchi, Kunihiro Sakamoto, Kenichi Ishii, Junichi Tsukada, Yuki Ishikawa, Hiromi Yamauchi, Eiichi Suzuki, Atsushi Ogura, Meishoku Masahara

    Japanese Journal of Applied Physics 48 (5 PART 2) 2009/05

    DOI: 10.1143/JJAP.48.05DC01  

    ISSN: 0021-4922

    eISSN: 1347-4065

  120. Low temperature, beam-orientation-dependent, lattice-plane-independent, and damage-free oxidation for three-dimensional structure by neutral beam oxidation

    Masahiro Yonemoto, Toru Ikoma, Keisuke Sano, Kazuhiko Endo, Takashi Matsukawa, Meishoku Masahara, Seiji Samukawa

    Japanese Journal of Applied Physics 48 (4 PART 2) 2009/04

    DOI: 10.1143/JJAP.48.04C007  

    ISSN: 0021-4922

    eISSN: 1347-4065

  121. Comprehensive Analysis of Variability Sources of FinFET Characteristics

    Matsukawa, T., O'Uchi, S., Endo, K., Ishikawa, Y., Yamauchi, H., Liu, Y. X., Tsukada, J., Sakamoto, K., Masahara, M., Jsap,

    2009

    DOI: 10.1109/iwsda.2009.5346407  

  122. Highly reliable SRAM circuit technology using FinFETs

    Shin Ichi O'uchi, Kazuhiko Endo, Takashi Matsukawa, Yongxun Liu, Yuki Ishikawa, Junichi Tsukada, Hiromi Yamauchi, Kunihiro Sakamoto, Meishoku Masahara

    ECS Transactions 19 (4) 273-282 2009

    DOI: 10.1149/1.3117418  

    ISSN: 1938-5862

    eISSN: 1938-6737

  123. Fluctuation analysis of parasitic resistance in FinFETs with scaled fin thickness

    Takashi Matsukawa, Kazuhiko Endo, Yuki Ishikawa, Hiromi Yamauchi, Shinichi O'uchi, Yongxun Liu, Junichi Tsukada, Kenichi Ishii, Kunihiro Sakamoto, Eiichi Suzuki, Meishoku Masahara

    IEEE Electron Device Letters 30 (4) 407-409 2009

    DOI: 10.1109/LED.2009.2014180  

    ISSN: 0741-3106

  124. Metal-gate FinFET variation analysis by measurement and compact model

    Shin Ichi O'uchi, Takashi Matsukawa, Tadashi Nakagawa, Kazuhiko Endo, Yongxun Liu, Toshihiro Sekigawa, Junichi Tsukada, Yuki Ishikawa, Hiromi Yamauchi, Kenichi Ishii, Eiichi Suzuki, Hanpei Koike, Kunihiro Sakamoto, Meishoku Masahara

    IEEE Electron Device Letters 30 (5) 556-558 2009

    DOI: 10.1109/LED.2009.2016769  

    ISSN: 0741-3106

  125. Independent-double-gate FinFET SRAM for leakage current reduction

    Kazuhiko Endo, Shin Ichi O'uchi, Yuki Ishikawa, Yongxun Liu, Takashi Matsukawa, Kunihiro Sakamoto, Meishoku Masahara, Junichi Tsukada, Kenichi Ishii, Hiromi Yamauchi, Eiichi Suzuki

    IEEE Electron Device Letters 30 (7) 757-759 2009

    DOI: 10.1109/LED.2009.2021075  

    ISSN: 0741-3106

  126. Reduction of moisture in semiconductor dry process equipment by generating extremely low oxygen ambience

    Kazuhiko Endo, Naoki Shirakawa, Yoshiyuki Yoshida, Takeshi Iwase, Tetsuya Mino

    Japanese Journal of Applied Physics 48 (8 Part 2) 2009

    DOI: 10.1143/JJAP.48.08HH01  

    ISSN: 0021-4922

    eISSN: 1347-4065

  127. Flex-pass-gate SRAM for static noise margin enhancement using FinFET-based technology

    Shin ichi O'uchi, Kazuhiko Endo, Meishoku Masahara, Kunihiro Sakamoto, Yongxun Liu, Takashi Matsukawa, Toshihiro Sekigawa, Hanpei Koike, Eiichi Suzuki

    Solid-State Electronics 52 (11) 1694-1702 2008/11

    DOI: 10.1016/j.sse.2008.06.025  

    ISSN: 0038-1101

  128. A Ta/Mo interdiffusion dual metal gate technology for drivability enhancement of FinFETs

    Takashi Matsukawa, Kazuhiko Endo, Yongxun Liu, Shinichi O'uchi, Yuki Ishikawa, Hiromi Yamauchi, Junichi Tsukada, Kenichi Ishii, Meishoku Masahara, Kunihiro Sakamoto, Eiichi Suzuki

    IEEE Electron Device Letters 29 (6) 618-620 2008/06

    DOI: 10.1109/LED.2008.922965  

    ISSN: 0741-3106

  129. FinFET-based flex-Vth SRAM design for drastic standby-leakage-current reduction

    Shin Ichi O'uchi, Meishoku Masahara, Kazuhiko Endo, Yongxun Liu, Takashi Matsukawa, Kunihiro Sakamoto, Toshihiro Sekigawa, Hanpel Koike, Eiichi Suzuki

    IEICE Transactions on Electronics E91-C (4) 534-542 2008/04

    DOI: 10.1093/ietele/e91-c.4.534  

    ISSN: 0916-8524

    eISSN: 1745-1353

  130. Dual-metal-gate transistors with symmetrical threshold voltages using work-function-tuned Ta/Mo bilayer metal gates

    Takashi Matsukawa, Yongxun Liu, Kazuhiko Endo, Meishoku Masahara, Yuki Ishikawa, Hiromi Yamauchi, Junichi Tsukada, Kenichi Ishh, Eiichi Suzuki

    Japanese Journal of Applied Physics 47 (4 PART 2) 2428-2432 2008/04

    DOI: 10.1143/JJAP.47.2428  

    ISSN: 0021-4922

    eISSN: 1347-4065

  131. Nitrogen gas flow ratio and rapid thermal annealing temperature dependences of sputtered titanium nitride gate work function and their effect on device characteristics

    Yongxun Liu, Tetsuro Hayashida, Takashi Matsukawa, Kazuhiko Endo, Meishoku Masahara, Shinich O'uchi, Kunihiro Sakamoto, Kenichi Ishii, Junichi Tsukada, Yuki Ishikawa, Hiromi Yamauchi, Atsushi Ogura, Eiichi Suzuki

    Japanese Journal of Applied Physics 47 (4 PART 2) 2433-2437 2008/04

    DOI: 10.1143/JJAP.47.2433  

    ISSN: 0021-4922

    eISSN: 1347-4065

  132. Dual Metal Gate FinFET Integration by Ta/Mo Diffusion Technology for Vt Reduction and Multi-Vt CMOS Application Peer-reviewed

    Takashi Matsukawa, Kazuhiko Endo, Yongxun Liu, Shin-ichi O&apos;uchi, Melshoku Masahara, Yuki Ishikawa, Hiromi Yamauchl, Junichl Tsukada, Ken-ichi Ishii, Kunihiro Sakamoto, Eiichi Suzuki

    ESSDERC 2008: PROCEEDINGS OF THE 38TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE 282-285 2008

    DOI: 10.1109/ESSDERC.2008.4681753   10.1109/essderc.2008.4681753  

    ISSN: 1930-8876

  133. Variable-threshold-voltage FinFETs with a control-voltage range within the logic-level swing using asymmetric work-function double gates

    O'Uchi, S., Sakamoto, K., Endo, K., Masahara, M., Matsukawa, T., Liu, Y. X., Hioki, M., Nakagawa, T., Sekigawa, T., Koike, H., Suzuki, E., Ieee,

    2008

    DOI: 10.1109/vtsa.2008.4530778  

  134. Enhancing SRAM Cell Performance by Using Independent Double-Gate FinFET

    Endo, K., O'Uchi, S., Ishikawa, Y., Liu, Y. X., Matsukawa, T., Sakamoto, K., Tsukada, J., Ishii, K., Yamauchi, H., Suzuki, E., Masahara, M., Ieee,

    2008

  135. Characterization of Metal-Gate FinFET Variability Based on Measurements and Compact Model Analyses

    O'Uchi, S., Matsukawa, T., Nakagawa, T., Endo, K., Liu, Y. X., Sekigawa, T., Tsukada, J., Ishikawa, Y., Yamauchi, H., Ishii, K., Suzuki, E., Koike, H., Sakamoto, K., Masahara, M., Ieee,

    2008

  136. Vertical double-gate mosfet device technology

    Meishoku Masahara, Yongxun Liu, Kazuhiko Endo, Takashi Matsukawa, Eiichi Suzuki

    Electronics and Communications in Japan 91 (1) 46-51 2008/01

    DOI: 10.1002/ecj.10021  

    ISSN: 1942-9533

  137. Static noise margin enhancement by flex-pass-gate SRAM

    Shin Ichi O'uchi, Meishoku Masahara, Kunihiro Sakamoto, Kazuhiko Endo, Yungxun Liu, Takashi Matsukawa, Toshihiro Sekigawa, Hanpei Koike, Eiichi Suzuki

    IEEJ Transactions on Electronics, Information and Systems 128 (6) 2008

    DOI: 10.1541/ieejeiss.128.919  

    ISSN: 0385-4221

    eISSN: 1348-8155

  138. Threshold-voltage reduction of FinFETs by Ta/Mo interdiffusion dual metal-gate technology for low-operating-power application

    Takashi Matsukawa, Kazuhiko Endo, Yongxun Liu, Shinichi O'uchi, Yuki Ishikawa, Hiromi Yamauchi, Junichi Tsukada, Kenichi Ishii, Meishoku Masahara, Kunihiro Sakamoto, Eiichi Suzuki

    IEEE Transactions on Electron Devices 55 (9) 2454-2461 2008

    DOI: 10.1109/TED.2008.927648  

    ISSN: 0018-9383

  139. Advanced metal gate FinFET CMOS technology

    Y. X. Liu, T. Matsukawa, K. Endo, M. Masahara, S. O'uchi, K. Ishii, K. Sakamoto, E. Suzuki

    ECS Transactions 13 (2) 239-252 2008

    DOI: 10.1149/1.2908637  

    ISSN: 1938-5862

    eISSN: 1938-6737

  140. Experimental evaluation of effects of channel doping on characteristics of FinFETs

    Kazuhiko Endo, Yuki Ishikawa, Yongxum Liu, Meishoku Masahara, Takashi Matsukawa, Shin Ichi O'uchi, Kenichi Ishii, Hiromi Yamauchi, Juniichi Tsukada, Eiichi Suzuki

    IEEE Electron Device Letters 28 (12) 1123-1125 2007/12

    DOI: 10.1109/LED.2007.909841  

    ISSN: 0741-3106

  141. Fin-height controlled TiN-gate FinFET CMOS based on experimental mobility

    Y. X. Liu, T. Matsukawa, K. Endo, M. Masahrara, S. O'uchi, H. Yamauchi, K. Ishii, J. Tsukada, Y. Ishikawa, K. Sakamoto, E. Suzuki

    Microelectronic Engineering 84 (9-10) 2101-2104 2007/09

    DOI: 10.1016/j.mee.2007.04.080  

    ISSN: 0167-9317

  142. Cointegration of high-performance tied-gate three-terminal FinFETs and variable threshold-voltage independent-gate four-terminal FinFETs with asymmetric gate-oxide thicknesses

    Yongxun Liu, Takashi Matsukawa, Kazuhiko Endo, Meishoku Masahara, Shin Ichi O'uchi, Kenichi Ishii, Hiromi Yamauchi, Junichi Tsukada, Yuki Ishikawa, Eiichi Suzuki

    IEEE Electron Device Letters 28 (6) 517-519 2007/06

    DOI: 10.1109/LED.2007.896898  

    ISSN: 0741-3106

  143. A dynamical power-management demonstration using four-terminal separated-ate FinFETs

    K. Endo, Y. Ishikawa, Y. X. Liu, T. Matsukawa, S. O'uchi, K. Ishii, M. Masahara, J. Tsukada, H. Yamauchi, T. Sekigawa, H. Koike, E. Suzuki

    IEEE Electron Device Letters 28 (5) 452-454 2007/05

    DOI: 10.1109/LED.2007.895451  

    ISSN: 0741-3106

  144. Ta/Mo stack dual metal gate technology applicable to gate-first processes

    Takashi Matsukawa, Yongxun Liu, Kazuhiko Endo, Meishoku Masahara, Kenichi Ishii, Hiromi Yamauchi, Junichi Tsukada, Eiichi Suzuki

    Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers 46 (4 B) 1825-1829 2007/04

    DOI: 10.1143/JJAP.46.1825  

    ISSN: 0021-4922

    eISSN: 1347-4065

  145. Four-terminal FinFETs fabricated using an etch-back gate separation

    Kazuhiko Endo, Yuki Ishikawa, Yongxun Liu, Kenichi Ishii, Takashi Matsukawa, Shin Ichi O'uchi, Meishoku Masahara, Etsuro Sugimata, Jyunichi Tsukada, Hiromi Yamauchi, Eiichi Suzuki

    IEEE Transactions on Nanotechnology 6 (2) 201-204 2007/03

    DOI: 10.1109/TNANO.2007.891830  

    ISSN: 1536-125X

  146. Fabrication and power-management demonstration of four-terminal FinFETs

    K. Endo, Y. Liu, M. Masahara, T. Matsukawa, S. O'uchi, E. Suzuki

    ECS Transactions 6 (4) 71-82 2007

    DOI: 10.1149/1.2728843  

    ISSN: 1938-5862

    eISSN: 1938-6737

  147. Advanced DG-MOSFETs process technologies

    E. Suzuki, Y. X. Liu, K. Endo, T. Matsukawa, M. Masahara, K. Sakamoto, S. O'uchi

    ECS Transactions 11 (6) 339-348 2007

    DOI: 10.1149/1.2778391  

    ISSN: 1938-5862

    eISSN: 1938-6737

  148. Optimum gate workfunction for v <inf>th</inf>-Controllable four-terminal-driven double-gate MOSFETs (4T-XMOSFETs) - Band-edge workfunction versus midgap workfunction

    Meishoku Masahara, Shin Ichi O'Uchi, Yongxun Liu, Kunihiro Sakamoto, Kazuhiko Endo, Takashi Matsukawa, Toshihiro Sekigawa, Hanpei Koike, Eiichi Suzuki

    IEEE Transactions on Nanotechnology 5 (6) 716-721 2006/11

    DOI: 10.1109/TNANO.2006.883484  

    ISSN: 1536-125X

  149. Investigation of the TiN gate electrode with tunable work function and its application for FinFET fabrication

    Yongxun Liu, Shinya Kijima, Etsuro Sugimata, Meishoku Masahara, Kazuhiko Endo, Takashi Matsukawa, Kenichi Ishii, Kunihiro Sakamoto, Toshihiro Sekigawa, Hiromi Yamauchi, Yoshifumi Takanashi, Eiichi Suzuki

    IEEE Transactions on Nanotechnology 5 (6) 723-728 2006/11

    DOI: 10.1109/TNANO.2006.885035  

    ISSN: 1536-125X

  150. Fabrication of FinFETs by damage-free neutral-beam etching technology

    Kazuhiko Endo, Shuichi Noda, Meishoku Masahara, Tomohiro Kubota, Takuya Ozaki, Seiji Samukawa, Yongxun Liu, Kenichi Ishii, Yuki Ishikawa, Etsuro Sugimata, Takashi Matsukawa, Hidenori Takashima, Hiromi Yamauchi, Eiichi Suzuki

    IEEE Transactions on Electron Devices 53 (8) 1826-1833 2006/08

    DOI: 10.1109/TED.2006.877035  

    ISSN: 0018-9383

  151. New fabrication technology of fin field effect transistors using neutral-beam etching

    Kazuhiko Endo, Shuichi Noda, Takuya Ozaki, Seiji Samukawa, Meishoku Masahara, Yongxun Liu, Kenichi Ishii, Hidenori Takashima, Etsuro Sugimata, Takashi Matsukawa, Hiromi Yamauchi, Yuki Ishikawa, Eiichi Suzuki

    Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers 45 (6 B) 5513-5516 2006/06/20

    DOI: 10.1143/JJAP.45.5513  

    ISSN: 0021-4922

    eISSN: 1347-4065

  152. Demonstration and analysis of accumulation-mode double-gate metal-oxide-semiconductor field-effect transistor

    Meishoku Masahara, Kazuhiko Endo, Yongxun Liu, Takashi Matsukawa, Shinichi O'Uchi, Kenichi Ishii, Etsuro Sugimata, Eiichi Suzuki

    Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers 45 (4 B) 3079-3083 2006/04

    DOI: 10.1143/JJAP.45.3079  

    ISSN: 0021-4922

    eISSN: 1347-4065

  153. Experimental study of effective carrier mobility of multi-fin-type double-gate metal-oxide-semiconductor field-effect transistors with (111) channel surface fabricated by orientation-dependent wet etching

    Yongxun Liu, Etsuro Sugimata, Kenichi Ishii, Meishoku Masahara, Kazuhiko Endo, Takashi Matsukawa, Hiromi Yamauchi, Shinichi O'Uchi, Eiichi Suzuki

    Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers 45 (4 B) 3084-3087 2006/04

    DOI: 10.1143/JJAP.45.3084  

    ISSN: 0021-4922

    eISSN: 1347-4065

  154. Investigation of n-channel triple-gate metal-oxide-semiconductor field-effect transistors on (100) silicon on insulator substrate

    Kazuhiko Endo, Meishoku Masahara, Yongxun Liu, Takashi Matsukawa, Kenichi Ishii, Etsurou Sugimata, Hidenori Takashima, Hiromi Yamauchi, Eiichi Suzuki

    Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers 45 (4 B) 3097-3100 2006/04

    DOI: 10.1143/JJAP.45.3097  

    ISSN: 0021-4922

    eISSN: 1347-4065

  155. Fabrication of a vertical-channel double-gate metal-oxide-semiconductor field-effect transistor using a neutral beam etching

    Kazuhiko Endo, Shuichi Noda, Meishoku Masahara, Tomohiro Kubota, Takuya Ozaki, Seiji Samukawa, Yongxun Liu, Kenichi Ishii, Yuki Ishikawa, Etsuro Sugimata, Takashi Matsukawa, Hidenori Takashima, Hiromi Yamauchi, Eiichi Suzuki

    Japanese Journal of Applied Physics, Part 2: Letters 45 (8-11) 2006/03/10

    DOI: 10.1143/JJAP.45.L279  

    ISSN: 0021-4922

    eISSN: 1347-4065

  156. Four-terminal double-gate logic for LSTP applications below 32-nm technology node

    O'Uchi, S., Liu, Y. X., Masahara, M., Tsutsumi, T., Endo, K., Nakagawa, T., Hioki, M., Sekigawa, T., Koike, H., Suzuki, E., Ieee,

    2006

  157. Advanced TiN metal-gate FinFET technology

    Y. X. Liu, E. Sugimata, T. Matsukawa, M. Masahara, K. Endo, K. Ishii, T. Shimizu, H. Yamauchi, S. O'uchi, Eiichi Suzuki

    ECS Transactions 2 (1) 197-208 2006

    ISSN: 1938-5862

    eISSN: 1938-6737

  158. Vertical double-gate MOSFET device technology

    Meishoku Masahara, Yongxun Liu, Kazuhiko Endo, Takashi Matsukawa, Eiichi Suzuki

    IEEJ Transactions on Electronics, Information and Systems 126 (6) 2006

    DOI: 10.1541/ieejeiss.126.702  

    ISSN: 0385-4221

    eISSN: 1348-8155

  159. Fabrication and characterization of vertical-type double-gate metal-oxide-semiconductor field-effect transistor with ultrathin Si channel and self-aligned source and drain

    Meishoku Masahara, Yongxun Liu, Kazuhiko Endo, Takashi Matsukawa, Kunihiro Sakamoto, Kenichi Ishii, Shinichi O'uchi, Etsuro Sugimata, Hiromi Yamauchi, Eiichi Suzuki

    Applied Physics Letters 88 (7) 2006

    DOI: 10.1063/1.2173715  

    ISSN: 0003-6951

  160. Deoxidization of Cu oxide under extremely low oxygen pressure ambient

    Kazuhiko Endo, Naoki Shirakawa, Yoshiyuki Yoshida, Shin Ichi Ikeda, Tetsuya Mlno, Eishi Gofuku, Eiichi Suzuki

    Japanese Journal of Applied Physics, Part 2: Letters 45 (12-16) 2006

    DOI: 10.1143/JJAP.45.L393  

    ISSN: 0021-4922

    eISSN: 1347-4065

  161. Demonstration, analysis, and device design considerations for independent DG MOSFETs

    Meishoku Masahara, Yongxun Liu, Kunihiro Sakamoto, Kazuhiko Endo, Takashi Matsukawa, Kenichi Ishii, Toshihiro Sekigawa, Hiromi Yamauchi, Hisao Tanoue, Seigo Kanemaru, Hanpei Koike, Eiichi Suzuki

    IEEE Transactions on Electron Devices 52 (9) 2046-2053 2005/09

    DOI: 10.1109/TED.2005.855063  

    ISSN: 0018-9383

  162. Electron mobility in multi-FinFET with a (111) channel surface fabricated by orientation-dependent wet etching

    Y. X. Liu, E. Sugimata, M. Masahara, K. Endo, K. Ishii, T. Matsukawa, H. Takashima, H. Yamauchi, E. Suzuki

    Microelectronic Engineering 80 (SUPPL.) 390-393 2005/06/17

    DOI: 10.1016/j.mee.2005.04.014  

    ISSN: 0167-9317

  163. Work function controllability of metal gates made by interdiffusing metal stacks with low and high work functions

    T. Matsukawa, Y. X. Liu, M. Masahara, K. Ishii, K. Endo, H. Yamauchi, E. Sugimata, H. Takashima, T. Higashino, E. Suzuki, S. Kanemaru

    Microelectronic Engineering 80 (SUPPL.) 284-287 2005/06/17

    DOI: 10.1016/j.mee.2005.04.034  

    ISSN: 0167-9317

  164. Device design consideration for V<inf>th</inf>-controllable four-terminal double-gate metal-oxide-semiconductor field-effect transistor

    Meishoku Masahara, Yongxun Liu, Kunihiro Sakamoto, Kazuhiko Endo, Toshihiro Sekigawa, Takashi Matsukawa, Eiichi Suzuki

    Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers 44 (4 B) 2351-2356 2005/04

    DOI: 10.1143/JJAP.44.2351  

    ISSN: 0021-4922

  165. Demonstration of dopant profiling in ultrathin channels of vertical-type double-gate metal-oxide-semiconductor field-effect-transistor by scanning nonlinear Dielectric microscopy

    Meishoku Masahara, Shinichi Hosokawa, Takashi Matsukawa, Kazuhiko Endo, Yuichi Naitou, Hisao Tanoue, Eiichi Suzuki

    Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers 44 (4 B) 2400-2404 2005/04

    DOI: 10.1143/JJAP.44.2400  

    ISSN: 0021-4922

  166. An experimental study on the thermal stability of sputtered TiN gates for gate-first FinFETs

    Y. X. Liu, E. Sugimata, T. Matsukawa, M. Masahara, K. Endo, K. Ishii, T. Shimizu, E. Suzuki

    2005 International Semiconductor Device Research Symposium 2005 201-202 2005

  167. Advanced FinFET technology: TiN metal-gate CMOS and 3T/4T device integration

    Liu, Y. X., Endo, K., Masahara, M., Sugimata, E., Matsukawa, T., Ishii, K., Yamauchi, H., Shimizu, T., Sakamoto, K., O'Uchi, S., Sekigawa, T., Suzuki, E., Ieee,

    2005

  168. Dopant profiling in vertical ultrathin channels of double-gate metal-oxide-semiconductor field-effect transistors by using scanning nonlinear dielectric microscopy

    Meishoku Masahara, Shinichi Hosokawa, Takashi Matsukawa, Kazuhiko Endo, Yuuichi Naitou, Hisao Tanoue, Eiichi Suzuki

    Applied Physics Letters 85 (18) 4139-4141 2004/11/01

    DOI: 10.1063/1.1812571  

    ISSN: 0003-6951

  169. Precipitate-free films of La <inf>1-x</inf>Sr <inf>x</inf>MnO <inf>3</inf> grown on the substrates with artificial step edges

    Y. Ishii, H. Sato, A. Sawa, T. Yamada, H. Akoh, K. Endo, M. Kawasaki, Y. Tokura

    Applied Physics Letters 85 (17) 3800-3802 2004/10/25

    DOI: 10.1063/1.1807969  

    ISSN: 0003-6951

  170. Metal organic atomic layer deposition of metal silicate film for high-k gate dielectrics

    Kazuhiko Endo, Toru Tatsumi

    Japanese Journal of Applied Physics, Part 2: Letters 43 (10 A) 2004/10/01

    DOI: 10.1143/JJAP.43.L1296  

    ISSN: 0021-4922

  171. On the V-th controllability for 4-terminal double-gate MOSFETs

    Masahara, A., Liu, Y. X., Sakamoto, K., Endo, K., Ishii, K., Matsukawa, T., Hosokawa, S., Sekigawa, T., Tanoue, H., Yamauchi, H., Kanemaru, S., Suzuki, E., Ieee,

    2004

  172. Suppression of Charges in Al<inf>2</inf>O<inf>3</inf> Gate Dielectric and Improvement of MOSFET Performance by Plasma Nitridation

    Kenzo Manabe, Kazuhiko Endo, Satoshi Kamiyama, Toshiyuki Iwamoto, Takashi Ogura, Nobuyuki Ikarashi, Toyoji Yamamoto, Toru Tatsumi

    IEICE Transactions on Electronics E87-C (1) 30-36 2004/01

    ISSN: 0916-8524

  173. Metal organic atomic layer deposition of high-k gate dielectrics using plasma oxidation

    Kazuhiko Endo, Toru Tatsumi

    Japanese Journal of Applied Physics, Part 2: Letters 42 (6 B) 2003/06/15

    DOI: 10.1143/jjap.42.l685  

    ISSN: 0021-4922

  174. Plasma deposition of low-dielectric-constant fluorinated amorphous carbon

    Kazuhiko Endo, Keisuke Shinoda, Toru Tatsumi

    Journal of Applied Physics 86 (5) 2739-2745 1999/09

    DOI: 10.1063/1.371119  

    ISSN: 0021-8979

  175. Fluorinated amorphous carbon thin films for multilevel interconnections of integrated circuits

    Toru Tatsumi, Kazuhiko Endo

    Journal of Photopolymer Science and Technology 12 (2) 193-198 1999

    DOI: 10.2494/photopolymer.12.193  

    ISSN: 0914-9244

  176. Application of fluorinated amorphous carbon thin films for low dielectric constant interlayer dielectrics

    Kazuhiko Endo, Toru Tatsumi, Yoshihisa Matsubara, Tadahiko Horiuchi

    Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers 37 (4 SUPPL. A) 1809-1814 1998/04

    DOI: 10.1143/jjap.37.1809  

    ISSN: 0021-4922

  177. RC delay reduction of 0.18 mu m CMOS technology using low dielectric constant fluorinated amorphous carbon

    Matsubara, Y., Kishimoto, K., Endo, K., Iguchi, M., Tatsumi, T., Gomi, H., Horiuchi, T., Tzou, E., Xi, M., Cheng, L. Y., Tribula, D., Moghadam, F., Ieee, Ieee

    1998

    DOI: 10.1109/iedm.1998.746486  

  178. Controlling fluorine concentration of fluorinated amorphous carbon thin films for low dielectric constant interlayer dielectrics

    Kazuhiko Endo, Toru Tatsumi

    Japanese Journal of Applied Physics, Part 2: Letters 36 (11 SUPPL. B) 1997/11/15

    DOI: 10.1143/jjap.36.l1531  

    ISSN: 0021-4922

  179. Fluorinated amorphous carbon as a low-dielectric-constant interlayer dielectric

    Kazuhiko Endo

    MRS Bulletin 22 (10) 55-58 1997/10

    DOI: 10.1557/S0883769400034217  

    ISSN: 0883-7694

  180. Amorphous carbon thin films containing benzene rings for use as low-dielectric-constant interlayer dielectrics

    Kazuhiko Endo, Toru Tatsumi

    Applied Physics Letters 70 (19) 2616-2618 1997/05/12

    DOI: 10.1063/1.118935  

    ISSN: 0003-6951

  181. Deposition of silicon dioxide films on amorphous carbon films by plasma enhanced chemical vapor deposition for low dielectric constant interlayer dielectrics

    Kazuhiko Endo, Toru Tatsumi, Yoshihisa Matsubara

    Applied Physics Letters 70 (9) 1078-1079 1997/03/03

    DOI: 10.1063/1.118490  

    ISSN: 0003-6951

  182. Plasma fluorination of polyimide thin films

    Kazuhiko Endo, Toru Tatsumi

    Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films 15 (6) 3134-3137 1997

    DOI: 10.1116/1.580857  

    ISSN: 0734-2101

  183. Fluorinated amorphous carbon thin films grown from C <inf>4</inf>F <inf>8</inf> for multilevel interconnections of integrated circuits

    Kazuhiko Endo, Toru Tatsumi

    NEC Research and Development 38 (3) 287-292 1997

    ISSN: 0547-051X

  184. Effect of bias addition on the gap-filling properties of fluorinated amorphous carbon thin films grown by helicon wave plasma-enhanced chemical vapor deposition

    Kazuhiko Endo, Toru Tatsumi, Yoshihisa Matsubara

    Japanese Journal of Applied Physics, Part 2: Letters 35 (10 SUPPL. B) 1996/10/15

    DOI: 10.1143/jjap.35.l1348  

    ISSN: 0021-4922

  185. Low-k fluorinated amorphous carbon interlayer technology for quarter micron devices

    Matsubara, Y., Endo, K., Tatsumi, T., Ueno, H., Sugai, K., Horiuchi, T., Ieee,

    1996

    DOI: 10.1109/iedm.1996.553605  

  186. Fluorinated amorphous carbon thin films grown by helicon plasma enhanced chemical vapor deposition for low dielectric constant interlayer dielectrics

    Kazuhiko Endo, Toru Tatsumi

    Applied Physics Letters 68 (20) 2864-2866 1996

    DOI: 10.1063/1.116350  

    ISSN: 0003-6951

  187. Changes in transition temperature of the Si(111)1 × 1-7 × 7 phase transition observed under various oxygen environments

    Katsuyuki Tsukui, Kazuhiko Endo, Ryu Hasunuma, Osamu Hirabayashi, Nobuaki Yagi, Hajime Aihara, Toshiaki Osaka, Iwao Ohdomari

    Surface Science 328 (3) 1995/05/01

    DOI: 10.1016/0039-6028(95)00233-2  

    ISSN: 0039-6028

  188. Fluorinated amorphous carbon thin films grown by plasma enhanced chemical vapor deposition for low dielectric constant interlayer dielectrics

    Kazuhiko Endo, Toru Tatsumi

    Journal of Applied Physics 78 (2) 1370-1372 1995

    DOI: 10.1063/1.360313  

    ISSN: 0021-8979

  189. Extremely High Vacuum System for Dynamical Surface Analysis

    Katsuyuki Tsukui, Kazuhiko Endo, Ryu Hasunuma, Toshiaki Osaka, Iwao Ohdomari

    Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films 11 (5) 2655-2658 1993/09

    DOI: 10.1116/1.578621  

    ISSN: 0734-2101

    eISSN: 1520-8559

  190. Treatment of the wall materials of extremely high vacuum chamber for dynamical surface analysis

    Katsuyuki Tsukui, Ryu Hasunuma, Kazuhiko Endo, Toshiaki Osaka, Iwao Ohdomari

    Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films 11 (2) 417-421 1993/03

    DOI: 10.1116/1.578746  

    ISSN: 0734-2101

    eISSN: 1520-8559

Show all ︎Show first 5

Misc. 4

  1. High Electron Mobility Germanium FinFET Fabricated by Neutarl Beam

    Ohori Daisuke, Noda Shuichi, Fujii Takuya, Mizubayashi Wataru, Endo Kazuhiko, Li Yiming, Lee Yao-Jen, Ozaki Takuya, Samukawa Seiji

    JSAP Annual Meetings Extended Abstracts 2021.1 2361-2361 2021/02/26

    Publisher: The Japan Society of Applied Physics

    DOI: 10.11470/jsapmeeting.2021.1.0_2361  

    eISSN: 2436-7613

  2. Effect of Solution of Containing Glycerol for 2D Ferritin Arrangemen

    Ohori Daisuke, Takeuchi Sou, Sato Asahi, Ishida Teruhisa, Sota Masahiro, Tanaka Mami, Endo Kazuhiko, Samukawa Seiji

    JSAP Annual Meetings Extended Abstracts 2021.1 2307-2307 2021/02/26

    Publisher: The Japan Society of Applied Physics

    DOI: 10.11470/jsapmeeting.2021.1.0_2307  

    eISSN: 2436-7613

  3. Fabrication of High-Efficiency GaN Micro-LEDs by Using Neutral-Beam Etching

    Zhu Jun, Takahashi Tokio, Endo Kazuhiko, Ohori Daisuke, Samukawa Seiji, Wang Xue-Lun

    JSAP Annual Meetings Extended Abstracts 80th 3522-3522 2019

    Publisher: The Japan Society of Applied Physics

    DOI: 10.11470/jsapmeeting.2019.2.0_3522  

    eISSN: 2436-7613

  4. 中性粒子ビームとバイオテンプレートを用いた高アスペクト比Siナノピラー構造の作製

    大堀大介, 遠藤和彦, 遠藤和彦, 寒川誠二, 寒川誠二

    応用物理学会春季学術講演会講演予稿集(CD-ROM) 65th ROMBUNNO.19p‐C204‐2-1848 2018

    Publisher: The Japan Society of Applied Physics

    DOI: 10.11470/jsapmeeting.2018.1.0_1848  

    eISSN: 2436-7613

Books and Other Publications 7

  1. Phenyl silica glass for formation of porous dielectric film

    Endo, K., Shinoda, K., Tatsumi, T.

    1999

  2. Time-dependent reliability of the interface between a-C : F and inorganic dielectrics

    Endo, K., Shinoda, K., Tatsumi, T., Matsubara, Y., Iguchi, M., Horiuchi, T.

    1998

  3. Copper damascene using low dielectric constant fluorinated amorphous carbon interlayer

    Matsubara, Y., Endo, K., Iguchi, M., Ito, N., Aoyama, K., Tatsumi, T., Horiuchi, T.

    1998

  4. Aluminum wiring reliability of fluorinated amorphous carbon interlayer

    Iguchi, M., Matsubara, Y., Ito, S., Endo, K., Koyanagi, K., Kishimoto, K., Gomi, H., Tatsumi, T., Horiuchi, T.

    1998

  5. Fluorinated amorphous carbon thin films grown from C4F8 for multilevel interconnections of integrated circuits

    Endo, K., Tatsumi, T., Matsubara, Y., Horiuchi, T.

    1997

  6. Adhesion of a-C : F during oxygen plasma annealing

    Matsubara, Y., Endo, K., Tatsumi, T., Horiuchi, T.

    1997

  7. Preparation and properties of fluorinated amorphous carbon thin films by plasma enhanced chemical vapor deposition

    Endo, K., Tatsumi, T.

    1995

Show all Show first 5

Presentations 124

  1. Hydrogen Iodide (HI) Neutral Beam Etching for InGaN/GaN Micro-LED

    Takahiro Ishihara, Daisuke Ohori, Xuelun Wang, Kazuhiko Endo, Nobuhiro Natori, Daisuke Sato, Yiming Li, Seiji Samukawa

    Proceedings of the IEEE Conference on Nanotechnology 2022

  2. Surface wettability of nanopillar array structures fabricated by biolate ultimate top-down processes

    Sou Takeuchi, Daisuke Ohori, Teruhisa Ishida, Mami Tanaka, Masahiro Sota, Yiming Li, Jenn Hwan Tarng, Kazuhiko Endo, Seiji Sarnukawa

    Proceedings of the IEEE Conference on Nanotechnology 2021/07/28

  3. Si Nanopillar/SiGe Composite Structure for Thermally Managed Nano-devices

    Daisuke Ohori, Masayuki Murata, Atsushi Yamamoto, Kazuhiko Endo, Min Hui Chuang, Ming Yi Lee, Yiming Li, Jenn Hwan Tarng, Yao Jen Lee, Seiji Samukawa

    Proceedings of the IEEE Conference on Nanotechnology 2021/07/28

  4. Surface wettability of nanopillar array structures fabricated by bio-template ultimate top-down processes

    Sou Takeuchi, Daisuke Ohori, Teruhisa Ishida, Mami Tanaka, Masahiro Sota, Yiming Li, Jenn-Hwan Tarng, Kazuhiko Endo, Seiji Sarnukawa

    2021 IEEE 21ST INTERNATIONAL CONFERENCE ON NANOTECHNOLOGY (IEEE NANO 2021) 2021

  5. Toward Long-coherence-time Si Spin Qubit: The Origin of Low-frequency Noise in Cryo-CMOS

    H. Oka, T. Matsukawa, K. Kato, S. Iizuka, W. Mizubayashi, K. Endo, T. Yasuda, T. Mori

    Digest of Technical Papers - Symposium on VLSI Technology 2020/06

  6. Analysis of charge-to-hot-carrier degradation in Ge pFinFETs

    Wataru Mizubayashi, Hiroshi Oka, Koichi Fukuda, Yuki Ishikawa, Kazuhiko Endo

    IEEE International Reliability Physics Symposium Proceedings 2020/04

  7. Post-si nano device technology

    Kazuhiko Endo

    Proceedings of International Conference on ASIC 2019/10

  8. Characteristics of Carrier Mobility and Phonon Scattering by Controlling Spacing of Si Nanopillars in SiGe

    Ohori Daisuke, Kuboyama Hidesato, Murata Masayuki, Yamamoto Atsushi, Nomura Masahiro, Endo Kazuhiko, Samukawa Seiji

    JSAP Annual Meetings Extended Abstracts 2019/02/25

  9. Multidomain Dynamics of Ferroelectric Polarization and its Coherency-Breaking in Negative Capacitance Field-Effect Transistors

    Hiroyuki Ota, Tsutomu Ikegami, Koichi Fukuda, Junichi Hattori, Hidehiro Asai, Kazuhiko Endo, Shinji Migita, Akira Toriumi

    Technical Digest - International Electron Devices Meeting, IEDM 2019/01/16

  10. Multidomain Dynamics of Ferroelectric Polarization and its Coherency-Breaking in Negative Capacitance Field-Effect Transistors

    Hiroyuki Ota, Tsutomu Ikegami, Koichi Fukuda, Junichi Hattori, Hidehiro Asai, Kazuhiko Endo, Shinji Migita, Akira Toriumi

    2018 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) 2018/12

  11. Position Control and Gas Source CVD Growth Technologies of 2D MX<inf>2</inf> Materials for Real LSI Applications

    T. Irisawa, N. Okada, W. Mizubayashi, T. Mori, W. H. Chang, K. Koga, A. Ando, K. Endo, S. Sasaki, T. Endo, Y. Miyata

    2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings 2018/07/26

  12. Cluster-preforming-deposited amorphous WSi<inf>n</inf> (n = 12) insertion film of low SBH and high diffusion barrier for direct Cu contact

    Naoya Okada, Noriyuki Uchida, Sinichi Ogawa, Kazuhiko Endo, Toshihiko Kanayama

    Technical Digest - International Electron Devices Meeting, IEDM 2018/01/23

  13. Short Channel Modeling of Tunnel FET's

    K. Fukuda, H. Asai, J. Hattori, T. Mori, Y. Morita, W. Mizubayashi, M. Masahara, S. Migita, H. Ota, K. Endo, T. Matsukawa

    Extended Abstracts of the 2017 International Conference on Solid State Devices and Materials 2017/09/21

  14. Advanced FinFET technologies for boosting SRAM performance

    Kazuhiko Endo

    Proceedings of International Conference on ASIC 2017/07/01

  15. Lowering of effective work function induced by metal carbide/HfO<inf>2</inf> interface dipole for advanced CMOS

    Wataru Mizubayashi, Hiroyuki Ota, Shinji Migita, Yukinori Morita, Kazuhiko Endo

    16th International Conference on Nanotechnology - IEEE NANO 2016 2016/11/21

  16. Spike-based time-domain weighted-sum calculation using nanodevices for low power operation

    Takashi Morie, Haichao Liang, Takashi Tohara, Hirofumi Tanaka, Makoto Igarashi, Seiji Samukawa, Kazuhiko Endo, Yasuo Takahashi

    16th International Conference on Nanotechnology - IEEE NANO 2016 2016/11/21

  17. Defect-free germanium etching for 3D Fin MOSFET using neutral beam etching

    En Tzu Lee, Shuichi Noda, Wataru Mizubayashi, Kazuhiko Endo, Seiji Samukawa

    16th International Conference on Nanotechnology - IEEE NANO 2016 2016/11/21

  18. On the Drain Bias Dependence of Tunnel FETs

    K. Fukuda, T. Mori, H. Asai, J. Hattori, W. Mizubayashi, Y. Morita, H. Fuketa, S. Migita, H. Ota, M. Masahara, K. Endo, T. Matsukawa

    Extended Abstracts of the 2016 International Conference on Solid State Devices and Materials 2016/09/28

  19. Tunnel FinFET CMOS Inverter with Very Low Short-Circuit Current for Ultra-Low Power IoT Application

    Yukinori Morita, Koichi Fukuda, Yongxun Liu, Takahiro Mori, Wataru Mizubayashi, Shin-ichi O'uchi, Hiroshi Fuketa, Shintaro Otsuka, Shinji Migita, Meishoku Masahara, Kazuhiko Endo, Hiroyuki Ota, Takashi Matsukawa

    International Conference on Solid State Devices and Materials (SSDM) 2016/09

  20. Low temperature microwave annealed FinFETs with less Vth variability

    K. Endo, Y. J. Lee, Y. Ishikawa, F. K. Hsueh, P. J. Sung, Y. X. Liu, T. Matsukawa, S. O'Uchi, J. Tsukada, H. Yamauchi, M. Masahara

    2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016 2016/05/27

  21. Experimental study of charge trapping type FinFET flash memory

    Yongxun Liu, Toshihide Nabatame, Takashi Matsukawa, Kazuhiko Endo, Sinichi O'Uchi, Junichi Tsukada, Hiromi Yamauchi, Yuki Ishikawa, Wataru Mizubayashi, Yukinori Morita, Shinji Migita, Hiroyuki Ota, Toyohiro Chikyow, Meishoku Masahara

    2014 IEEE International Nanoelectronics Conference, INEC 2014 2016/04

  22. Low Temperature Microwave Annealed FinFETs with Less Vth Variability

    Endo, K., Lee, Y. J., Ishikawa, Y., Hsueh, F. K., Sung, P. J., Liu, Y. X., Matsukawa, T., O'Uchi, S., Tsukada, J., Yamauchi, H., Masahara, M., Ieee,

    2016 International Symposium on Vlsi Technology, Systems and Application 2016

  23. Fabrication and characterization of 3D fin-channel MANOS type flash memory

    Y. X. Liu, T. Nabatame, T. Matsukawa, K. Endo, S. O'Uchi, J. Tsukada, H. Yamauchi, Y. Ishikawa, W. Mizubayashi, Y. Morita, S. Migita, H. Ota, T. Chikyow, M. Masahara

    2014 Silicon Nanoelectronics Workshop, SNW 2014 2015/12/04

  24. 0.8-V rail-to-rail operational amplifier with near-V<inf>t</inf> gain-boosting stage fabricated in FinFET technology for IoT sensor nodes

    Shin Ichi O'Uchi, Yongxun Liu, Tadashi Nakagawa, Wataru Mizubayashi, Shinji Migita, Noriyuki Morita, Hiroyuki Ota, Yuki Ishikawa, Junichi Tsukada, Hanpei Koike, Meishoku Masahara, Kazuhiko Endo, Takashi Matsukawa

    2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015 2015/11/20

  25. Variability suppression of FinFETs by smoothing sidewall roughness using ion beam etching technology

    T. Matsukawa, K. Endo, H. Akasaka, Y. Kamiya, M. Ikeda, K. Tsunekawa, T. Nakagawa, Y. X. Liu, M. Masahara

    2015 Silicon Nanoelectronics Workshop, SNW 2015 2015/09/24

  26. PBTI for N-type tunnel FinFETs

    W. Mizubayashi, T. Mori, K. Fukuda, Y. X. Liu, T. Matsukawa, Y. Ishikawa, K. Endo, S. O'Uchi, J. Tsukada, H. Yamauchi, Y. Morita, S. Migita, H. Ota, M. Masahara

    2015 International Conference on IC Design and Technology, ICICDT 2015 2015/07/23

  27. Experimental study of variability in polycrystalline and crystalline silicon channel FinFET CMOS inverters

    Y. X. Liu, Y. Hori, M. Ohno, T. Matsukawa, K. Endo, S. O'Uchi, J. Tsukada, H. Yamauchi, Y. Ishikawa, W. Mizubayashi, Y. Morita, S. Migita, H. Ota, M. Masahara

    International Symposium on VLSI Technology, Systems, and Applications, Proceedings 2015/06/03

  28. Accurate prediction of PBTI lifetime for N-type fin-channel tunnel FETs

    W. Mizubayashi, T. Mori, K. Fukuda, Y. X. Liu, T. Matsukawa, Y. Ishikawa, K. Endo, S. O'Uchi, J. Tsukada, H. Yamauchi, Y. Morita, S. Migita, H. Ota, M. Masahara

    Technical Digest - International Electron Devices Meeting, IEDM 2015/02/20

  29. Scaling breakthrough for analog/digital circuits by suppressing variability and low-frequency noise for FinFETs by amorphous metal gate technology

    Takashi Matsukawa, Koichi Fukuda, Yongxun Liu, Junichi Tsukada, Hiromi Yamauchi, Yuki Ishikawa, Kazuhiko Endo, Shin Ichi O'Uchi, Shinji Migita, Wataru Mizubayashi, Yukinori Morita, Hiroyuki Ota, Meishoku Masahara

    Technical Digest - International Electron Devices Meeting, IEDM 2015/02/20

  30. Experimental realization of complementary p- and n- tunnel FinFETs with subthreshold slopes of less than 60 mV/decade and very low (pA/μm) off-current on a Si CMOS platform

    Y. Morita, T. Mori, K. Fukuda, W. Mizubayashi, S. Migita, T. Matsukawa, K. Endo, S. O'Uchi, Y. Liu, M. Masahara, H. Ota

    Technical Digest - International Electron Devices Meeting, IEDM 2015/02/20

  31. Novel wafer-scale uniform layer-by-layer etching technology for line edge roughness reduction and surface flattening of 3D Ge channels

    Y. Morita, T. Maeda, H. Ota, W. Mizubayashi, S. O'Uchi, M. Masahara, T. Matsukawa, K. Endo

    Technical Digest - International Electron Devices Meeting, IEDM 2015/02/16

  32. Understanding of BTI for tunnel FETs

    W. Mizubayashi, T. Mori, K. Fukuda, Y. Ishikawa, Y. Morita, S. Migita, H. Ota, Y. X. Liu, S. O'Uchi, J. Tsukada, H. Yamauchi, T. Matsukawa, M. Masahara, K. Endo

    Technical Digest - International Electron Devices Meeting, IEDM 2015/02/16

  33. Variation behavior of tunnel-FETs originated from dopant concentration at source region and channel edge configuration

    S. Migita, T. Matsukawa, T. Mori, K. Fukuda, Y. Morita, W. Mizubayashi, K. Endo, Y. Liu, S. O'Uchi, M. Masahara, H. Ota

    European Solid-State Device Research Conference 2014/11/05

  34. Improvement of epitaxial channel quality on heavily arsenic- and boron-doped Si surfaces and impact on tunnel FET performance

    Y. Morita, T. Mori, S. Migita, W. Mizubayashi, K. Fukuda, T. Matsukawa, K. Endo, S. O'Uchi, Y. X. Liu, M. Masahara, H. Ota

    European Solid-State Device Research Conference 2014/11/05

  35. Lowest variability SOI FinFETs having multiple V<inf>t</inf> by back-biasing

    T. Matsukawa, K. Fukuda, Y. X. Liu, K. Endo, J. Tsukada, H. Yamauchi, Y. Ishikawa, S. O'Uchi, W. Mizubayashi, S. Migita, Y. Morita, H. Ota, M. Masahara

    Digest of Technical Papers - Symposium on VLSI Technology 2014/09/08

  36. Accurate Prediction of PBTI Lifetime for N-type Fin-Channel Tunnel FETs

    W. Mizubayashi, T. Mori, K. Fukuda, Y. X. Liu, T. Matsukawa, Y. Ishikawa, K. Endo, S. O'uchi, J. Tsukada, H. Yamauchi, Y. Morita, S. Migita, H. Ota, M. Masahara

    2014 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) 2014

  37. Fabrication and Characterization of 3D Fin-Channel MANOS Type Flash Memory

    Y. X. Liu, T. Nabatame, T. Matsukawa, K. Endo, S. O'uchi, J. Tsukada, H. Yamauchi, Y. Ishikawa, W. Mizubayashi, Y. Morita, S. Migita, H. Ota, T. Chikyow, M. Masahara

    2014 IEEE SILICON NANOELECTRONICS WORKSHOP (SNW) 2014

  38. Experimental Study of Charge Trapping Type FinFET Flash Memory

    Yongxun Liu, Toshihide Nabatame, Takashi Matsukawa, Kazuhiko Endo, Sinichi O'uchi, Junichi Tsukada, Hiromi Yamauchi, Yuki Ishikawa, Wataru Mizubayashi, Yukinori Morita, Shinji Migita, Hiroyuki Ota, Toyohiro Chikyow, Meishoku Masahara

    2014 IEEE INTERNATIONAL NANOELECTRONICS CONFERENCE (INEC) 2014

  39. Fluctuation in drain induced barrier lowering (DIBL) for FinFETs caused by granular work function variation of metal gates

    T. Matsukawa, K. Fukuda, Y. X. Liu, K. Endo, J. Tsukada, Y. Ishikawa, H. Yamauchi, S. O'Uchi, S. Migita, W. Mizubayashi, Y. Morita, H. Ota, M. Masahara

    Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014 2014

  40. Suppressed Variability of Current-Onset Voltage of FinFETs by Improvement of Work Function Uniformity of Metal Gates

    Matsukawa, T., Liu, Y. X., Endo, K., Mizubayashi, W., Tsukada, J., Ishikawa, Y., Yamauchi, H., O'Uchi, S., Ota, H., Migita, S., Morita, Y., Masahara, M., Ieee,

    2013 International Symposium on Vlsi Technology, Systems, and Applications 2013

  41. Analysis of Threshold Voltage Shifts in Double Gate Tunnel FinFETs: Effects of Improved Electrostatics by Gate Dielectrics and Back Gate Effects

    Mizubayashi, W., Fukuda, K., Mori, T., Endo, K., Liu, Y. X., Matsukawa, T., O'Uchi, S., Ishikawa, Y., Migita, S., Morita, Y., Tanabe, A., Tsukada, J., Yamauchi, H., Masahara, M., Ota, H., Ieee,

    2013 International Symposium on Vlsi Technology, Systems, and Applications 2013

  42. Heated ion implantation technology for highly reliable metal-gate/high-k CMOS SOI FinFETs

    W. Mizubayashi, H. Onoda, Y. Nakashima, Y. Ishikawa, T. Matsukawa, K. Endo, Y. X. Liu, S. O'Uchi, J. Tsukada, H. Yamauchi, S. Migita, Y. Morita, H. Ota, M. Masahara

    Technical Digest - International Electron Devices Meeting, IEDM 2013

  43. Enhancing SRAM performance by advanced FinFET device and circuit technology collaboration for 14nm node and beyond

    Kazuhiko Endo, Shin Ichi O'Uchi, Takashi Matsukawa, Yongxun Liu, Kunihiro Sakamoto, Wataru Mizubayashi, Shinji Migita, Yukinori Morita, Hiroyuki Ota, Eiichi Suzuki, Meishoku Masahara

    IEEE Symposium on VLSI Circuits, Digest of Technical Papers 2013

  44. Synthetic electric field tunnel FETs: Drain current multiplication demonstrated by wrapped gate electrode around ultrathin epitaxial channel

    Y. Morita, T. Mori, S. Migita, W. Mizubayashi, A. Tanabe, K. Fukuda, T. Matsukawa, K. Endo, S. O'Uchi, Y. X. Liu, M. Masahara, H. Ota

    Digest of Technical Papers - Symposium on VLSI Technology 2013

  45. Analysis of threshold voltage shifts in double gate tunnel FinFETs: Effects of improved electrostatics by gate dielectrics and back gate effects

    W. Mizubayashi, K. Fukuda, T. Mori, K. Endo, Y. X. Liu, T. Matsukawa, S. O'Uchi, Y. Ishikawa, S. Migita, Y. Morita, A. Tanabe, J. Tsukada, H. Yamauchi, M. Masahara, H. Ota

    2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013 2013

  46. Suppressed variability of current-onset voltage of FinFETs by improvement of work function uniformity of metal gates

    T. Matsukawa, Y. X. Liu, K. Endo, W. Mizubayashi, J. Tsukada, Y. Ishikawa, H. Yamauchi, S. O'Uchi, H. Ota, S. Migita, Y. Morita, M. Masahara

    2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013 2013

  47. Performance limit of parallel electric field tunnel FET and improvement by modified gate and channel configurations

    Y. Morita, T. Mori, S. Migita, W. Mizubayashi, A. Tanabe, K. Fukuda, T. Matsukawa, K. Endo, S. O'uchi, Y. X. Liu, M. Masahara, H. Ota

    European Solid-State Device Research Conference 2013

  48. Guidelines for symmetric threshold voltage in tunnel FinFETs with single and dual metal gate electrodes

    W. Mizubayashi, K. Fukuda, T. Mori, K. Endo, Y. X. Liu, T. Matsukawa, S. O'uchi, Y. Ishikawa, S. Migita, Y. Morita, A. Tanabe, J. Tsukada, H. Yamauchi, M. Masahara, H. Ota

    European Solid-State Device Research Conference 2013

  49. Analysis of Vth flexibility in ultrathin-BOX SOI FinFETs

    K. Endo, Y. Ishikawa, Y. Liu, T. Matsukawa, S. O'Uchi, J. Tsukada, S. Migita, W. Mizubayashi, Y. Morita, H. Ota, H. Yamauchi, M. Masahara

    2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2013 2013

  50. Charge trapping type FinFET flash memory with Al<inf>2</inf>O<inf>3</inf> blocking layer

    Y. X. Liu, T. Nabatame, T. Matsukawa, K. Endo, S. O'Uchi, J. Tsukada, H. Yamauchi, Y. Ishikawa, W. Mizubayashi, Y. Morita, S. Migita, H. Ota, T. Chikyow, M. Masahara

    2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2013 2013

  51. Flexible V th FinFETs with 9-nm-thick extremely-thin BOX

    Endo, K., Migita, S., Ishikawa, Y., Liu, Y., Matsukawa, T., O'Uchi, S., Tsukada, J., Mizubayashi, W., Morita, Y., Ota, H., Yamauchi, H., Masahara, M.

    2012 IEEE International SOI Conference 2012

  52. Suppressing V<inf>t</inf> and G<inf>m</inf> variability of FinFETs using amorphous metal gates for 14 nm and beyond

    Takashi Matsukawa, Yongxun Liu, Wataru Mizubayashi, Junichi Tsukada, Hiromi Yamauchi, Kazuhiko Endo, Yuki Ishikawa, Shin Ichi O'Uchi, Hiroyuki Ota, Shinji Migita, Yukinori Morita, Meishoku Masahara

    Technical Digest - International Electron Devices Meeting, IEDM 2012

  53. Experimental study of tri-gate SOI-FinFET flash memory

    Y. X. Liu, T. Kamei, T. Matsukawa, K. Endo, S. O'Uchi, J. Tsukada, H. Yamauchi, Y. Ishikawa, T. Hayashida, K. Sakamoto, A. Ogura, M. Masahara

    Proceedings - IEEE International SOI Conference 2012

  54. Cryogenic operation of double-gate FinFET and demonstration of analog circuit at 4.2K

    S. O'Uchi, K. Endo, M. Maezawa, T. Nakagawa, H. Ota, Y. X. Liu, T. Matsukawa, Y. Ishikawa, J. Tsukada, H. Yamauchi, W. Mizubayashi, S. Migita, Y. Morita, T. Sekigawa, H. Koike, K. Sakamoto, M. Masahara

    Proceedings - IEEE International SOI Conference 2012

  55. Flexible V<inf>th</inf> FinFETs with 9-nm-thick extremely-thin BOX

    K. Endo, S. Migita, Y. Ishikawa, Y. Liu, T. Matsukawa, S. O'Uchi, J. Tsukada, W. Mizubayashi, Y. Morita, H. Ota, H. Yamauchi, M. Masahara

    Proceedings - IEEE International SOI Conference 2012

  56. Comparative study of tri-gate- and double-gate-type poly-Si fin-channel split-gate flash memories

    Y. X. Liu, T. Kamei, T. Matsukawa, K. Endo, S. O'uchi, J. Tsukada, H. Yamauchi, Y. Ishikawa, T. Hayashida, K. Sakamoto, A. Ogura, M. Masahara

    2012 IEEE Silicon Nanoelectronics Workshop, SNW 2012 2012

  57. Influence of Fin Height on Poly-Si/PVD-TiN Stacked Gate FinFET Performance

    Hayashida, T., Endo, K., Liu, Y. X., O'Uchi, S., Matsukawa, T., Mizubayashi, W., Migita, S., Morita, Y., Ota, H., Hashiguchi, H., Kosemura, D., Kamei, T., Tsukada, J., Ishikawa, Y., Yamauchi, H., Ogura, A., Masahara, M.

    2011 IEEE International SOI Conference 2011

  58. Comprehensive analysis of I on variation in metal gate FinFETs for 20nm and beyond

    Matsukawa, T., Liu, Y., O'Uchi, S., Endo, K., Tsukada, J., Yamauchi, H., Ishikawa, Y., Ota, H., Migita, S., Morita, Y., Mizubayashi, W., Sakamoto, K., Masahara, M.

    2011 IEEE International Electron Devices Meeting (IEDM 2011) 2011

  59. Influence of fin height on poly-Si/PVD-TiN stacked gate FinFET performance

    T. Hayashida, K. Endo, Y. X. Liu, S. O'uchi, T. Matsukawa, W. Mizubayashi, S. Migita, Y. Morita, H. Ota, H. Hashiguchi, D. Kosemura, T. Kamei, J. Tsukada, Y. Ishikawa, H. Yamauchi, A. Ogura, M. Masahara

    Proceedings - IEEE International SOI Conference 2011

  60. Variability origins of FinFETs and perspective beyond 20nm node

    Takashi Matsukawa, Yongxun Liu, Kazuhiko Endo, Shin Ichi O'uchi, Meishoku Masahara

    Proceedings - IEEE International SOI Conference 2011

  61. Comparative study of tri-gate flash memories with split and stack gates

    T. Kamei, Y. X. Liu, T. Matsukawa, K. Endo, S. O'uchi, J. Tsukada, H. Yamauchi, Y. Ishikawa, T. Hayashida, K. Sakamoto, A. Ogura, M. Masahara

    Proceedings - IEEE International SOI Conference 2011

  62. Variability analysis of scaled poly-Si channel FinFETs and tri-gate flash memories for high density and low cost stacked 3D-memory application

    Y. X. Liu, T. Mastukawa, K. Endo, S. O'uchi, J. Tsukada, H. Yamauchi, Y. Ishikawa, K. Sakamoto, M. Masahara, T. Kamei, T. Hayashida, A. Ogura

    European Solid-State Device Research Conference 2011

  63. Atomic layer deposition of 25-nm-thin sidewall spacer for enhancement of FinFET performance

    Kazuhiko Endo, Yuki Ishikawa, Takashi Matsukawa, Yongxum Liu, Shin Ichi O'uchi, Kunihiro Sakamoto, Junichi Tsukada, Hiromi Yamauchi, Meishoku Masahara

    European Solid-State Device Research Conference 2011

  64. Comprehensive analysis of I <inf>on</inf> variation in metal gate FinFETs for 20nm and beyond

    Takashi Matsukawa, Yongxun Liu, Shin Ichi O'uchi, Kazuhiko Endo, Junichi Tsukada, Hiromi Yamauchi, Yuki Ishikawa, Hiroyuki Ota, Shinji Migita, Yukinori Morita, Wataru Mizubayashi, Kunihiro Sakamoto, Meishoku Masahara

    Technical Digest - International Electron Devices Meeting, IEDM 2011

  65. Correlative analysis between characteristics of 30-nm L <inf>G</inf> FinFETs and SRAM performance

    Kazuhiko Endo, Shin Ichi O'Uchi, Yuki Ishikawa, Yongxun Liu, Takashi Matsukawa, Kunihiro Sakamoto, Junichi Tsukada, Hiromi Yamauchi, Meishoku Masahara

    Technical Digest - International Electron Devices Meeting, IEDM 2011

  66. HiSIM-DG for extracting statistical variations of measured I-V characteristics

    Y. Shintaku, H. Ichimiya, M. Miura-Mattausch, K. Endo, S. O'Uchi, M. Masahara

    Technical Proceedings of the 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011 2011

  67. Independent double-gate FinFET SRAM technology

    Kazuhiko Endo, Shi Ichi O'Uchi, Takashi Matsukawa, Yongxun Liu, Meishoku Masahara

    Proceedings - International NanoElectronics Conference, INEC 2011

  68. Advanced FinFET process technology for 20 nm node and beyond

    M. Masahara, T. Matsukawa, K. Endo, Y. X. Liu, W. Mizubayashi, S. Migita, S. O'Uchi, H. Ota, Y. Morita

    Proceedings - International NanoElectronics Conference, INEC 2011

  69. Influence of NiSi on parasitic resistance fluctuation of FinFETs

    T. Matsukawa, Y. X. Liu, K. Endo, J. Tsukada, Y. Ishikawa, H. Yamauchi, S. O'Uchi, K. Sakamoto, M. Masahara

    International Symposium on VLSI Technology, Systems, and Applications, Proceedings 2011

  70. Variability analysis of TiN FinFET SRAM cell performance and its compensation using Vth-controllable independent double-gate FinFET

    Endo, K., O'Uchi, S., Ishikawa, Y., Liu, Y., Matsukawa, T., Sakamoto, K., Tsukada, J., Yamauchi, H., Masahara, M.

    2010 International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA 2010) 2010

  71. Realization of 0.7-V analog circuits by adaptive-Vt operation of FinFET

    O'Uchi, S., Endo, K., Liu, Y. X., Nakagawa, T., Matsukawa, T., Ishikawa, Y., Tsukada, J., Sekigawa, T., Koike, H., Sakamoto, K., Masahara, M.

    2010 IEEE Custom Integrated Circuits Conference - CICC 2010 2010

  72. May the Fourth (terminal) be with you - Circuit Design beyond FinFET

    Koike, H., O'Uchi, S., Hioki, M., Endo, K., Matsukawa, T., Yongxun, Liu, Masahara, M., Tsutsumi, T., Sakamoto, K., Nakagawa, T., Sekigawa, T.

    2010 IEEE International Electron Devices Meeting (IEDM 2010) 2010

  73. Low Resistive ALD TiN Metal Gate using TDMAT Precursor for High Performance MOSFET

    Hayashida, T., Endo, K., Liu, Y. X., Kamei, T., Matsukawa, T., Ouchi, S., Sakamoto, K., Tsukada, J., Ishikawa, Y., Yamauchi, H., Ogura, A., Masahara, M.

    2010 Silicon Nanoelectronics Workshop 2010

  74. Fin-Height Controlled PVD-TiN Gate FinFET SRAM for Enhancing Noise Margin

    Liu, Y. X., Endo, K., O'Uchi, S., Tsukada, J., Yamauchi, H., Ishikawa, Y., Sakamoto, K., Matsukawa, T., Masahara, M., Kamei, T., Hayashida, T., Ogura, A.

    ESSDERC 2010 - 40th European Solid State Device Research Conference 2010

  75. Optimization of RTA process for PVD-TiN gate FinFETs

    Y. X. Liu, T. Kamei, K. Endo, S. O'uchi, J. Tsukada, H. Yamauchi, Y. Ishikawa, T. Hayashida, T. Matsukawa, K. Sakamoto, A. Ogura, M. Masahara

    Proceedings - IEEE International SOI Conference 2010

  76. High-frequency characterization of intrinsic FinFET channel

    H. Sakai, S. O'Uchi, T. Matsukawa, K. Endo, Y. X. Liu, T. Tsukada, Y. Ishikawa, T. Nakagawa, T. Sekigawa, H. Koike, K. Sakamoto, M. Masahara, H. Ishikuro

    Proceedings - IEEE International SOI Conference 2010

  77. 0.5V FinFET SRAM with dynamic threshold control of pass gates for salvaging malfunctioned bits

    S. O'uchi, K. Endo, Y. X. Liu, T. Nakagawa, T. Matsukawa, Y. Ishikawa, J. Tsukada, H. Yamauchi, T. Sekigawa, H. Koike, K. Sakamoto, M. Masahara

    ESSCIRC 2010 - 36th European Solid State Circuits Conference 2010

  78. Fin-height controlled PVD-TiN gate FinFET SRAM for enhancing noise margin

    Y. X. Liu, K. Endo, S. O'uchi, J. Tsukada, H. Yamauchi, Y. Ishikawa, K. Sakamoto, T. Matsukawa, M. Masahara, T. Kamei, T. Hayashida, A. Ogura

    2010 Proceedings of the European Solid State Device Research Conference, ESSDERC 2010 2010

  79. Realization of 0.7-V analog circuits by adaptive-vt operation of FinFET

    S. O'uchi, K. Endo, Y. X. Liu, T. Nakagawa, T. Matsukawa, Y. Ishikawa, J. Tsukada, T. Sekigawa, H. Koike, K. Sakamoto, M. Masahara

    Proceedings of the Custom Integrated Circuits Conference 2010

  80. May the fourth (terminal) be with you - Circuit design beyond FinFet

    Hanpei Koike, Shin Ichi O'uchi, Masakazu Hioki, Kazuhiko Endo, Takashi Matsukawa, Yongxun Liu, Meishoku Masahara, Toshiyuki Tsutsumi, Kunihiro Sakamoto, Tadashi Nakagawa, Toshihiro Sekigawa

    Technical Digest - International Electron Devices Meeting, IEDM 2010

  81. Independent-double-gate FINFET SRAM cell for drastic leakage current reduction

    Kazuhiko Endo, Shin Ichi O'uchi, Yuki Ishikawa, Yongxun Liu, Takashi Matsukawa, Kunihiro Sakamoto, Meishoku Masahara, Junichi Tsukada, Kenichi Ishii, Eiichi Suzuki

    Lecture Notes in Electrical Engineering 2010

  82. Low resistive ALD TiN metal gate using TDMAT precursor for high performance MOSFET

    T. Hayashida, K. Endo, Y. X. Liu, T. Kamei, T. Matsukawa, S. Ouchi, K. Sakamoto, J. Tsukada, Y. Ishikawa, H. Yamauchi, A. Ogura, M. Masahara

    2010 Silicon Nanoelectronics Workshop, SNW 2010 2010

  83. Variability analysis of TiN FinFET SRAM cell performance and its compensation using vth-controllable independent double-gate FinFET

    Kazuhiko Endo, Shin Ichi O'uchi, Yuki Ishikawa, Yongxun Liu, Takashi Matsukawa, Kunihiro Sakamoto, Junichi Tsukada, Hiromi Yamauchi, Meishoku Masahara

    Proceedings of 2010 International Symposium on VLSI Technology, System and Application, VLSI-TSA 2010 2010

  84. On the gate-stack origin threshold voltage variability in scaled FinFETs and Multi-FinFETs

    Y. X. Liu, K. Endo, S. O'uchi, T. Kamei, J. Tsukad, H. Yamauchi, Y. Ishikawa, T. Hayashida, K. Sakamoto, T. Matsu Kawa, A. Ogura, M. Masahara

    Digest of Technical Papers - Symposium on VLSI Technology 2010

  85. Work-function variation induced fluctuation in bias-temperature-instability characteristics of emerging metal-gate devices and implications for digital design

    Seid Hadi Rasouli, Kazuhiko Endo, Kaustav Banerjee

    IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD 2010

  86. Impact of FinFET technology on 6T-SRAM performance

    S. O'uchi, T. Nakagawa, T. Matsukawa, Y. X. Liu, K. Endo, T. Sekigawa, K. Sakamoto, H. Koike, M. Masahara

    Proceedings - IEEE International SOI Conference 2009

  87. A normally-off GaN FET with high threshold voltage uniformity using a novel piezo neutralization technique

    K. Ota, K. Endo, Y. Okamoto, Y. Ando, H. Miyamoto, H. Shimawaki

    Technical Digest - International Electron Devices Meeting, IEDM 2009

  88. Variation analysis of TiN FinFETs

    K. Endo, T. Matsukawa, Y. Ishikawa, Y. X. Liu, S. O'uchi, K. Sakamoto, J. Tsukada, H. Yamauchi, M. Masahara

    2009 International Semiconductor Device Research Symposium, ISDRS '09 2009

  89. Nanoscale TiN wet etching and its application for FinFET fabrication

    Y. X. Liu, T. Kamei, K. Endo, S. O'uchi, J. Tsukada, H. Yamauchi, T. Hayashida, Y. Ishikawa, T. Matsukawa, K. Sakamoto, A. Ogura, M. Masahara

    2009 International Semiconductor Device Research Symposium, ISDRS '09 2009

  90. Comprehensive analysis of variability sources of FinFET characteristics

    T. Matsukawa, S. O'uchi, K. Endo, Y. Ishikawa, H. Yamauchi, Y. X. Liu, J. Tsukada, K. Sakamoto, M. Masahara

    Digest of Technical Papers - Symposium on VLSI Technology 2009

  91. Variability analysis of FinFET-based devices and circuits considering electrical confinement and width quantization

    Seid Hadi Rasouli, Kazuhiko Endo, Kaustav Banerjee

    IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD 2009

  92. Modeling and Analysis of Grain-Orientation Effects in Emerging Metal-Gate Devices and Implications for SRAM Reliability

    Dadgour, H., Endo, K., De, V., Banerjee, K., Ieee,

    Ieee International Electron Devices Meeting 2008, Technical Digest 2008

  93. Impact of Extension and Source/Drain Resistance on FinFET Performance

    Matsukawa, T., Endo, K., Ishikawa, Y., Yamauchi, H., Liu, Y. X., O'Uchi, S., Tsukada, J., Ishii, K., Sakamoto, K., Suzuki, E., Masahara, M., Ieee,

    2008 Ieee International Soi Conference, Proceedings 2008

  94. Enhancing Noise Margins of FinFET SRAM by Integrating V(th)-Controllable Flexible-Pass-Gates

    Endo, Kazuhiko, Ouchi, Shin-ichi, Ishikawa, Yuki, Liu, Yongxum, Matsukawa, Takashi, Masahara, Meishoku, Sakamoto, Kunihiro, Tsukada, Junichi, Ishii, Kenichi, Yamauchi, Hiromi, Suzuki, Eiichi

    Essderc 2008: Proceedings of the 38th European Solid-State Device Research Conference 2008

  95. Impact of extension and source/drain resistance on FinFET performance

    T. Matsukawa, K. Endo, Y. Ishikawa, H. Yamauchi, Y. X. Liu, S. O'Uchi, J. Tsukada, K. Ishii, K. Sakamoto, E. Suzuki, M. Masahara

    Proceedings - IEEE International SOI Conference 2008

  96. Logic gate threshold voltage controllable single metal gate FinFET CMOS inverters implemented by using co-integration of 3T/4T-FinFETs

    Y. X. Liu, T. Sekigawa, T. Hayashida, T. Matsukawa, K. Endo, S. O'Uchi, K. Sakamoto, K. Ishii, T. Tsukada, Y. Ishikawa, H. Yamauchi, A. Ogura, H. Koike, E. Suzuki, M. Masahara

    Proceedings - IEEE International SOI Conference 2008

  97. Modeling and analysis of grain-orientation effects in emerging metal-gate devices and implications for sram reliability

    Hamed Dadgour, Kazuhiko Endo, De Vivek, Kaustav Banerjee

    Technical Digest - International Electron Devices Meeting, IEDM 2008

  98. An experimental study of TiN gate FinFET SRAM with (111)-oriented sidewall channels

    Y. X. Liu, T. Hayashida, T. Matsukawa, K. Endo, S. O'uchi, K. Sakamoto, M. Masahara, K. Ishii, J. Tsukada, Y. Ishikawa, H. Yamauchi, A. Ogura, E. Suzuki

    IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008 2008

  99. Characterization of metal-gate FinFET variability based on measurements and compact model analyses

    S. O'Uchi, T. Matsukawa, T. Nakagawa, K. Endo, Y. X. Liu, T. Sekigawa, J. Tsukada, Y. Ishikawa, H. Yamauchi, K. Ishii, E. Suzuki, H. Koike, K. Sakamoto, M. Masahara

    Technical Digest - International Electron Devices Meeting, IEDM 2008

  100. Enhancing SRAM cell performance by using independent double-gate finFET

    Kazuhiko Endo, Shin Ichi O'Uchi, Yuki Ishikawa, Yongxun Liu, Takashi Matsukawa, Kunihiro Sakamoto, Junichi Tsukada, Kenichi Ishii, Hiromi Yamauchi, Eiichi Suzuki, Meishoku Masahara

    Technical Digest - International Electron Devices Meeting, IEDM 2008

  101. Independent-gate four-terminal FinFET SRAM for drastic leakage current reduction

    Kazuhiko Endo, Shin Ichi O'uchi, Yuki Ishikawa, Yongxun Liu, Takashi Matsukawa, Kunihiro Sakamoto, Meishoku Masahara, Junichi Tsukada, Kenichi Ishii, Hiromi Yamauchi, Eiichi Suzuki

    Proceedings - 2008 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2008

  102. Variable-threshold-voltage FinFETs with a control-voltage range within the logic-level swing using asymmetric work-function double gates

    S. O'uchi, K. Sakamoto, K. Endo, M. Masahara, T. Matsukawa, Y. X. Liu, M. Hioki, T. Nakagawa, T. Sekigawa, H. Koike, E. Suzuki

    International Symposium on VLSI Technology, Systems, and Applications, Proceedings 2008

  103. Enhancing noise margins of finFET SRAM by integrating v<inf>th</inf>- controllable flexible-pass-gates

    Kazuhiko Endo, Shin Ichi O'Uchi, Yuki Ishikawa, Yongxum Liu, Takashi Matsukawa, Meishoku Masahara, Kunihiro Sakamoto, Junichi Tsukada, Kenichi Ishii, Hiromi Yamauchi, Eiichi Suzuki

    ESSDERC 2008 - Proceedings of the 38th European Solid-State Device Research Conference 2008

  104. A Ta/Mo Interdiffusion Gate Technology for Dual Metal Gate-First FinFET Fabrication

    Matsukawa, T., Endo, K., Liu, Y. X., O'Uchi, S., Ishikawa, Y., Yamauchi, H., Tsukada, J., Ishii, K., Masahara, M., Sakamoto, K., Suzuki, E., Ieee,

    2007 Ieee International Soi Conference Proceedings 2007

  105. Modeling and analysis of self-heating in FinFET devices for improved circuit and EOS/ESD performance

    Seshadri Kolluri, Kazuhiko Endo, Eiichi Suzuki, Kaustav Banerjee

    Technical Digest - International Electron Devices Meeting, IEDM 2007

  106. Four-terminal FinFET device technology

    M. Masahara, K. Endo, Y. X. Liu, S. O'uchi, T. Matsukawa, R. Surdeanu, L. Witters, G. Doombos, V. H. Nguyen, G. Van Den Bosch, C. Vrancken, M. Jurczak, S. Biesemans, E. Suzuki

    Proceedings 2007 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT 2007

  107. Nitrogen gas flow ratio controlled PVD TiN metal gate technology for FinFET CMOS

    Yongxun Liu, Tetsuro Hayashida, Takashi Matsukawa, Kazuhiko Endo, Meishoku Masahara, Shin Ichi O'uchi, Kunihoro Sakamoto, Kenichi Ishii, Junichi Tsukada, Yuki Ishikawa, Hiromi Yamauchi, Atsushi Ogura, Eiichi Suzuki

    2007 International Semiconductor Device Research Symposium, ISDRS 2007

  108. A Ta/Mo interdiffusion gate technology for dual metal gate-first FinFET fabrication

    T. Matsukawa, K. Endo, Y. X. Liu, S. O'Uchi, Y. Ishikawa, H. Yamauchi, J. Tsukada, K. Ishii, M. Masahara, K. Sakamoto, E. Suzuki

    Proceedings - IEEE International SOI Conference 2007

  109. Flex-Pass-Gate SRAM Design for Static Noise Margin Enhancement Using FinFET-Based Technology

    S. O'Uchi, M. Masahara, K. Sakamoto, K. Endo, Y. X. Liu, T. Matsukawa, T. Sekigawa, H. Koike, E. Suzuki

    Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC 2007 2007

  110. Advanced FinFET CMOS technology: TiN-Gate, fin-height control and asymmetric gate insulator thickness 4T-FinFETs

    Yongxun Liu, Takashi Matsukawa, Kazuhiko Endo, Meishoku Masahara, Kenichi Ishii, Shin Ichi O'Uchi, Hiromi Yamauchi, Junichi Tsukada, Yuki Ishikawa, Eiichi Suzuki

    Technical Digest - International Electron Devices Meeting, IEDM 2006

  111. Four-terminal double-gate logic for LSTP applications below 32-nm technology node

    S. O'uchi, Y. X. Liu, M. Masahara, T. Tsutsumi, K. Endo, T. Nakagawa, M. Hioki, T. Sekigawa, H. Koike, E. Suzuki

    2006 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT'06 2006

  112. Deoxidization of CU Oxide under extremely low oxygen pressure ambient

    Kazuhiko Endo, Naoki Shirakawa, Yoshiyuki Yoshida, Shin Ichi Ikeda, Tetsuya Mino, Eishi Gofuku, Eiichi Suzuki

    Advanced Metallization Conference (AMC) 2006

  113. A dynamical power-management demonstration using four-terminal separated-gate FinFETs

    K. Endo, Y. Ishikawa, Y. X. Liu, T. Matsukawa, S. O'uchi, K. Ishii, M. Masahara, J. Tsukada, H. Yamauchi, T. Sekigawa, H. Koike, E. Suzuki

    Proceedings - IEEE International SOI Conference 2006

  114. Ultimate top-down etching processes for future nanoscale devices

    Seiji Samukawa, Kazuhiko Endo

    ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings 2006

  115. Work function control of metal gates by interdiffused Ni-Ta with high thermal stability

    Matsukawa, T., Liu, Y. X., Masahara, M., Endo, K., Ishii, K., Yamauchi, H., Sugimata, E., Takashima, H., Kanemaru, S., Suzuki, E.

    Proceedings of Essderc 2005: 35th European Solid-State Device Research Conference 2005

  116. Damage-free neutral beam etching technology for high mobility FinFETs

    Endo, K., Noda, S., Masahara, M., Kubota, T., Ozaki, T., Samukawa, S., Yongxun, Liu, Ishii, K., Ishikawa, Y., Sugimata, E., Matsukawa, T., Takashima, H., Yamauchi, H., Suzuki, E.

    International Electron Devices Meeting 2005 (IEEE Cat. No.05CH37703C) 2005

  117. A new approach using artificial substrates for growth of high-quality precipitate-free HTS thin films, toward electronic device applications

    K. Endo, P. Badica, H. Sato, H. Akoh

    Materials Research Society Symposium Proceedings 2005

  118. A new fabrication technology of FinFETs using a neutral beam etching

    Kazuhikp Endo, Shuichi Noda, Takuya Ozaki, Seiji Samukawa, Meishoku Masahata, Yongxun Liu, Kenichi Ishii, Hidenori Takashima, Etsuro Sugimata, Takashi Matsukawa, Yuki Yamauchi, Yuki Ishikawa, Eiichi Suzuki

    Digest of Papers - Microprocesses and Nanotechnology 2005: 2005 International Microprocesses and Nanotechnology Conference 2005

  119. Comparative study on effective electron mobility in FinFETs with a (111) channel surface fabricated by wet and dry etching processes

    Y. X. Liu, E. Sugimata, M. Masahara, K. Ishii, K. Endo, T. Matsukawa, H. Yamauchi, E. Suzuki

    Digest of Papers - Microprocesses and Nanotechnology 2005: 2005 International Microprocesses and Nanotechnology Conference 2005

  120. An experimental study on the thermal stability of sputtered TiN gates for gate-first FinFETs

    Y. X. Liu, E. Sugimata, T. Matsukawa, M. Masahara, K. Endo, K. Ishii, T. Shimizu, E. Suzuki

    2005 International Semiconductor Device Research Symposium 2005

  121. A highly reliable barrier dielectric for Cu/SiOC interconnects from trimethylvinylsilane

    Endo, K., Morita, N., Usami, T., Ohto, K., Miyamoto, H.

    Advanced Metallization Conference 2003 2004

  122. Atomic layer deposition of high-k gate dielectrics using MO precursor and cyclic plasma exposure

    Endo, K., Tatsumi, T.

    Novel Materials and Processes for Advanced Cmos 2003

  123. Reliabilities and dielectric properties of fluorinated amorphous carbon films grown by plasma-enhanced CVD

    Endo, K., Shinoda, K., Tatsumi, T., Matsubara, Y., Iguchi, M., Horiuchi, T.

    Advanced Metallization Conference in 1998 (AMC 1998). Proceedings of the Conference 1999

  124. Preparation and properties of fluorinated amorphous carbon thin films by plasma enhanced chemical vapor deposition

    Kazuhiko Endo, Toru Tatsumi

    Materials Research Society Symposium - Proceedings 1995

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Research Projects 3

  1. Creation and characterization of new group IV clathrate material with direct gap

    Offer Organization: Japan Society for the Promotion of Science

    System: Grants-in-Aid for Scientific Research

    Category: Grant-in-Aid for Scientific Research (A)

    Institution: Gifu University

    2025/04/01 - 2029/03/31

  2. High-mobility Semiconductor Devices due to Control of Phonon Field caused by Defect-free Nano-periodic Structures

    Offer Organization: Japan Society for the Promotion of Science

    System: Grants-in-Aid for Scientific Research

    Category: Grant-in-Aid for Scientific Research (S)

    Institution: Tohoku University

    2020/08/31 - 2025/03/31

  3. A study of nanostructure memory devices and their integrated circuits toward massively parallel analog brain-like LSI

    Morie Takashi, TAMUKOH Hakaru, OHNO Takeo, KUBOTA Tomohiro, TOHARA Takashi, ANDO Hideyuki, TOMIZAKI KAZUMASA, KATO Takashi, WANG Quan, TANIMURA Hiroshi, YAMAGUCHI Masatoshi, HARADA Masataka, IWAMOTO Goki, YAMASHITA Kenya

    Offer Organization: Japan Society for the Promotion of Science

    System: Grants-in-Aid for Scientific Research

    Category: Grant-in-Aid for Scientific Research (A)

    Institution: Kyushu Institute of Technology

    2015/04/01 - 2019/03/31

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    To realize highly integrated and highly power efficient hardware implementing brain-like intelligent processing, we proposed a time-domain analog circuit architecture, and developed a large-scale integrated circuit (LSI) that achieves 30 times higher efficiency (lower energy consumption) using ten times larger fabrication technology compered to state-of-the-art digital LSIs. If the latest fabrication technology is used, more than 100 times higher efficiency can be achieved. As memory devices required to this circuit architecture, we developed fabrication technology for resistance change random access memory (ReRAM) devices that realize analog memory property and high resistance. We also proposed a parallel connected ReRAM-MOSFET device structure for stable analog operation and evaluated its function. We also fabricated nanostructures generating noise, which is required for brain-like processing, and their effectiveness was evaluated.